• Title/Summary/Keyword: Low power systems

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Design of 9 kJ/s High Voltage LiPo Battery based 2-stage Capacitor Charger (배터리 기반 2단 충전 9 kJ/s 고전압 충전기 설계)

  • Cho, Chan-Gi;Jia, Ziyi;Ryoo, Hong-Je
    • The Transactions of the Korean Institute of Power Electronics
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    • v.24 no.4
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    • pp.268-272
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    • 2019
  • A lithium polymer battery-based 9 kJ/s high-voltage capacitor charger, which comprises two stages, is proposed. A modified LCC resonant converter and resonant circuit are introduced at the first and second stages, respectively. In the first stage, the methods for handling low-voltage and high-current batteries are considered. Delta-wye three-phase transformers are used to generate a high output voltage through the difference between the phase and line-to-line voltages. Another method is placing the series resonant capacitor of the LCC resonant components on the transformer secondary side, which conducts considerably low current compared with the transformer primary side. On the basis of the stable operation of the first charging stage, the secondary charging stage generates final output voltage by using the resonance. This additional stage protects the rectifying diodes from the negative voltage when the output capacitor is discharged for a short time. The inductance and capacitance of the resonance components are selected by considering the resonance charging time. The design procedure for each stage with the aforementioned features is suggested, and its performance is verified by not only simulation but also experimental results.

A Study on IoT/LPWA-based Low Power Solar Panel Monitoring System for Smart City (스마트 시티용 IoT/LPWA 기반 저전력 태양광 패널 모니터링 시스템에 관한 연구)

  • Trung, Pham Minh;Mariappan, Vinayagam;Cha, Jae Sang
    • The Journal of The Korea Institute of Intelligent Transport Systems
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    • v.18 no.1
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    • pp.74-82
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    • 2019
  • The revolution of industry 4.0 is enabling us to build an intelligent connection society called smart cities. The use of renewable energy in particular solar energy is extremely important for modern society due to the growing power demand in smart cities, but its difficult to monitor and manage in each buildings since need to be deploy low energy sensors and information need to be transfer via wireless sensor network (WSN). The Internet of Things (IoT) / low-power wide-area (LPWA) is an emerging WSN technology, to collect and monitor data about environmental and physical electrical / electronics devices conditions in real time. However, providing power to IoT sensor end devices and other public electrical loads such as street lights, etc is an important challenging role because the sensor are usually battery powered and have a limited life time. In this paper, we proposes an efficient solar energy-based power management scheme for smart city based on IoT technology using LoRa wide-area network (LoRaWAN). This approach facilitates to maintain and prevent errors of solar panel based energy systems. The proposed solution maximizing output the power generated from solar panels system to distribute the power to the load and the grid. In this paper, we proved the efficiency of the proposed system with Simulink based system modeling and real-time emulation.

Low Power Trace Cache for Embedded Processor

  • Moon Je-Gil;Jeong Ha-Young;Lee Yong-Surk
    • Proceedings of the IEEK Conference
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    • summer
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    • pp.204-208
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    • 2004
  • Embedded business will be expanded market more and more since customers seek more wearable and ubiquitous systems. Cellular telephones, PDAs, notebooks and portable multimedia devices could bring higher microprocessor revenues and more rewarding improvements in performance and functions. Increasing battery capacity is still creeping along the roadmap. Until a small practical fuel cell becomes available, microprocessor developers must come up with power-reduction methods. According to MPR 2003, the instruction and data caches of ARM920T processor consume $44\%$ of total processor power. The rest of it is split into the power consumptions of the integer core, memory management units, bus interface unit and other essential CPU circuitry. And the relationships among CPU, peripherals and caches may change in the future. The processor working on higher operating frequency will exact larger cache RAM and consume more energy. In this paper, we propose advanced low power trace cache which caches traces of the dynamic instruction stream, and reduces cache access times. And we evaluate the performance of the trace cache and estimate the power of the trace cache, which is compared with conventional cache.

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ADC-Based Backplane Receivers: Motivations, Issues and Future

  • Chung, Hayun
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.3
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    • pp.300-311
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    • 2016
  • The analog-to-digital-converter-based (ADC-based) backplane receivers that consist of a front-end ADC followed by a digital equalizer are gaining more popularity in recent years, as they support more sophisticated equalization required for high data rates, scale better with fabrication technology, and are more immune to PVT variations. Unfortunately, designing an ADC-based receiver that meets tight power and performance budgets of high-speed backplane link systems is non-trivial as both front-end ADC and digital equalizer can be power consuming and complex when running at high speed. This paper reviews the state of art designs for the front-end ADC and digital equalizers to suggest implementation choices that can achieve high speed while maintaining low power consumption and complexity. Design-space exploration using system-level models of the ADC-based receiver allows through analysis on the impact of design parameters, providing useful information in optimizing the power and performance of the receiver at the early stage of design. The system-level simulation results with newer device parameters reveal that, although the power consumption of the ADC-based receiver may not comparable to the receivers with analog equalizers yet, they will become more attractive as the fabrication technology continues to scale as power consumption of digital equalizer scales well with process.

Level Up/Down Converter with Single Power-Supply Voltage for Multi-VDD Systems

  • An, Ji-Yeon;Park, Hyoun-Soo;Kim, Young-Hwan
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.10 no.1
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    • pp.55-60
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    • 2010
  • For battery-powered device applications, which grow rapidly in the electronic market today, low-power becomes one of the most important design issues of CMOS VLSI circuits. A multi-VDD system, which uses more than one power-supply voltage in the same system, is an effective way to reduce the power consumption without degrading operating speed. However, in the multi-VDD system, level converters should be inserted to prevent a large static current flow for the low-to-high conversion. The insertion of the level converters induces the overheads of power consumption, delay, and area. In this paper, we propose a new level converter which can provide the level up/down conversions for the various input and output voltages. Since the proposed level converter uses only one power-supply voltage, it has an advantage of reducing the complexity in physical design. In addition, the proposed level converter provides lower power and higher speed, compared to existing level converters.

E-ACPI : An Implementation of An Active Power Management Interface for Embedded Systems (E-ACPI : 임베디드 시스템에서 적극적 전력 관리를 위한 전력관리 인터페이스 구현)

  • Hwang, Young-Si;Chung, Ki-Seok
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.3
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    • pp.36-43
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    • 2008
  • The OS has the manager of the overall system operation, and has the exact information of the running system. Power management by the OS may have great impact for the optimization of the power consumption. We implement E-ACPI, an extended ACPI which is designed for an advanced power management of embedded systems. In this paper, we address (i) how we extend the exiting ACPI to E-ACPI, (ii) technical challenges to overcome in implementation, and (iii) flow we port our E-ACPI to an embedded linux system in this paper. Experimental results show that our E-ACPI is very useful and effective in practice.

A Study on the Adoption of Power Take Off Operation Mode and Fuel-Saving Effect in the Hybrid Electric Propulsion System for a Warship (전투함 하이브리드 전기추진 시스템의 PTO 운전모드 적용 및 연료절감 효과 연구)

  • Kim, So-Yeon
    • The Transactions of the Korean Institute of Power Electronics
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    • v.24 no.1
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    • pp.40-48
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    • 2019
  • Hybrid electric propulsion systems (H-EPSs) are an intermediate step for integrated full electric propulsion warships. H-EPSs are a dynamic combination of mechanical and electrical propulsion systems to achieve the required mission performances. The system modes could adapt to meet the requirement of the various operation conditions of a warship. This paper presents a configuration and operating modes of H-EPSs considering the operation conditions of a destroyer class warship. The system has three propulsion modes, namely, motoring mode, generating mode [power take off (PTO) mode], and mechanical mode. The PTO mode requires a careful fuel efficiency analysis because the fuel consumption rate of propulsion engines may be low compared with the generator's engines depending on the loading power. Therefore, the calculation of fuel consumption according to the operating modes is performed in this study. Although the economics of the PTO mode depends on system cases, it has an advantage in that it ensures the reliability of electric power in case of blackout or minimum generator operation.

Wake-Up Receiver System Design Using the DGS Rectenna (DGS Rectenna를 이용한 Wake-Up 수신기 시스템 설계)

  • Choi, Tae-Min;Lee, Seok-Jae;Lee, Hee-Jong;Lim, Jong-Sik;Ahn, Dal;Han, Sang-Min
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.23 no.3
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    • pp.377-383
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    • 2012
  • In this paper, a new design of a planar rectenna system and its application to a wake-up receiver operating for incoming signal with a specified frequency are proposed for low-power sensor system applications. The planar and integrable rectenna system is designed with DGSs(Defected Ground Structures) at 2.4 GHz. The DGSs reject harmonic components of 4.8 and 7.2 GHz and eliminate 2.4 GHz fundamental frequency for DC-path filtering. The rectenna system has been evaluated for the conversion output voltages, and applied to the switching of a power supply at the low-power sensor receivers. The proposed system has been evaluated for the wake-up performance by testing a lownoise amplifier operation. From the experimental results, the proposed receiver system presents excellent operation performances.

Design of a Trackable Buoy System using Join Request Messages (가입요청 메시지를 사용하는 추적 가능한 부표 시스템의 설계)

  • Cho, SungHo
    • Journal of Satellite, Information and Communications
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    • v.11 no.2
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    • pp.8-13
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    • 2016
  • A buoy is a float attached by chain to the seabed to mark channels in a harbor or underwater hazards and can be classified into two major types as autonomous buoys and fixed buoys. When there is high demand such as marking channels in a harbor, monitoring ecology of ocean and environmental monitoring of coastal areas, smart buoys are developed. The smart buoys have wireless network systems such as GPS, CDMA and ZigBee. Using the GPS techniques, location and environments of buoy can be monitored and traced. However, the GPS in fixed buoy systems has a high power consumption and cost. Using many buoys on low power ZigBee basis allows dramatic reduction of the overall power consumption. In this study, it is aimed at the design of the trackable protocol for a buoy system which has low data rate and low power consumption. The proposed protocol has advantages that it can detect abnormal movement and gather trackable information without any system changes. In the introduced protocol, additional 2 bits and join request messages are used for trackable buoy system. The behaviors of improved protocol is modeled into petri-net and proved a reachability.

Energy-Effective Low-Cost Small Mobile Robot Implementation for Mobile Sensor Network (모바일 센서 네트워크를 위한 에너지 효율적이고 경제적인 소형 이동 로봇의 개발)

  • Kim, Hong-Jun;Kim, Byung-Kook
    • Journal of Institute of Control, Robotics and Systems
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    • v.14 no.3
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    • pp.284-294
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    • 2008
  • In this paper, we describe an implementation of small mobile robot that can be used at research and application of mobile sensor networking. This robot that will constitute the sensor network, as a platform of multi-robot system for each to be used as sensor node, has to satisfy restrictions in many aspects in order to perform sensing, communication protocol, and application algorithms. First, the platform must be designed with a robust structure and low power consumption since its maintenance after deployment is difficult. Second, it must have flexibility and modularity to be used effectively in any structure so that it can be used in various applications. Third, it must support the technique of wireless network for ubiquitous computing environment. At last, to let many nodes be scattered, it must be cost-effective and small. Considering the above restrictions of the mobile platform for sensor network, we designed and implemented robots control the current of actuator by using additional circuit for power efficiency. And we chose MSP430 as MCU, CC2420 as RF transceiver, and etc, that have the strength in the aspect of power. For flexibility and modularity, the platform has expansion ports. The results of experiments are described to show that this robot can act as sensor node by RF communication process with Zigbee standard protocol, execute the navigation process with simple obstacle avoidance and the moving action with RSSI(Received Signal Strength Indicator), operate at low-power, and be made with approx. $100.