• 대한기계학회논문집A
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• 제32권1호
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• pp.1-6
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• 2008

This paper presents muscle-inspired serial digital actuators, achieving the improvement of the range-to-precision and range-to-voltage performance. We propose a weight-balanced design for the serial actuators with serpentine springs using serial arrangement of digital actuators. We have measured the displacement range, precision, and drive voltage at unit and serial actuation of 1Hz. The serial digital actuators produce a full range displacement of $28.44{\pm}0.02{\mu}m$, accumulating the unit displacement of $2.8{\pm}0.5{\mu}m$ at the operating voltage of $4.47{\pm}0.07V$. In addition, the serial digital actuators having the displacement precision of $37.94{\pm}6.26nm$ do not accumulate the precision of the unit actuators, $36.0{\pm}17.7nm$. We experimentally verify that the serial digital actuators achieve the range-to-squared-voltage ratio of $1.423{\mu}m/V^2$ and the range-to-precision ratio of 749.6.

• Journal of Power Electronics
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• 제16권5호
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• pp.1735-1742
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• 2016

This paper proposes an interleaved five-level boost converter based on a switched-capacitor network. The operating principle of the converter under the CCM mode is analyzed. A high voltage gain, low component stress, small input current ripple, and self-balancing function for the capacitor voltages in the switched-capacitor networks are achieved. In addition, a three-loop control strategy including an outer voltage loop, an inner current loop and a voltage-balance loop has been researched to achieve good performances and voltage-balance effect. An experimental study has been done to verify the correctness and feasibility of the proposed converter and control strategy.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2008년도 International Meeting on Information Display
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• pp.911-913
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• 2008

In this work, nonvolatile memory (NVM) devices for system on panel of flat panel display (FPD) were fabricated using low temperature polycrystalline silicon (LTPS) thin film transistor (TFT) technology with an oxide-nitride-oxynitride (ONOn) stack structure on glass. The results demonstrate that the NVM devices fabricated using the ONOn stack structure on glass have suitable switching characteristics for data storage with a low operating voltage, a threshold voltage window of more than 1.8 V between the programming and erasing (P/E) states after 10 years and its initial threshold voltage window (${\Delta}V_{TH}$) after $10^5$ P/E cycles.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2003년도 International Meeting on Information Display
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• pp.95-98
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• 2003

The positive column discharge characteristics in the long gap (440 ${\mu}m$) are investigated based on the voltage distribution among three electrodes. In particular, the effects of the amplitude and width of the short pulse applied to the address electrode on the positive column discharge characteristics are examined intensively. By proper controlling of the amplitude and width of the address short pulse, it is found that the positive column discharge in the long gap is well constructed. As a result, under the stable static voltage margin condition, the firing and sustaining voltages are as low as those of conventional short gap(60 ${\mu}m$) discharge($V _f=220V$, $V_s=150V$) and the color purity is improved. Moreover, the luminous efficiency increases up to 60% in comparison with the conventional case.

• 한국마이크로전자및패키징학회:학술대회논문집
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• 한국마이크로전자및패키징학회 2000년도 Proceedings of 5th International Joint Symposium on Microeletronics and Packaging
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• pp.119-119
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• 2000

A new type of low voltage driven SrTiO3 varistor was investigated. $SrTi3_3$ sintered with CuO-SiO2 additions, the sintering temperature was reduced to 1250-1300C. With the sintering additives, the semiconducting SrTi03 was able to fabricate single time sintering in reducing atmosphere(95% N2 + 5% H2), The non-linear coefficient value was 10.3 and the operating voltage was about 7 V.

• 대한전기학회논문지:전기기기및에너지변환시스템부문B
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• 제50권12호
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• pp.601-608
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• 2001

The ever increasing density of adjustable speed drives(ASD) device with non-linear operating characteristics has been to put tremendous harmonic stress on end user's electrical application. All ASD controllers which employ solid state power devices cause harmonic currents in the source side line. This paper describes harmonic problems for use of ASD. In order to investigate the effect of harmonics caused by using of nonlinear load at the low voltage system, we fixed up simple load model and measured the voltage and current waveforms. Measurement results show that additional operation of linear load at the parallel bus with nonlinear load such as ASD is helpful to the reduction of harmonic influence.

• 전자공학회논문지C
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• 제34C권6호
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• pp.37-43
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• 1997

In this paper, an analog-domain powr-reduction technique for a low-voltage CMOS operational amplifier and its application to clock-based VLSI systems are proposed. The proposed technique cuts off the bias current of the op amp during a half cycle of the clock in the sleeping mode and resumes the curent supply sequentially during the remaining cycle of the clock in the normal operating mode. The proposed sequential sbiasing technique reduces about 50% of the op amp power and improves the circuit performance through high phase margin and stable settling behavior of the output voltage. The power-reduction technique is applied to a sample-and-hold amplifier which is one of the critical circuit blocks used in the front-end stage of analog and/or digital integrated systems. The SHA was simulated and analyzed in a 0.8.mu.m n-well double-poly double-metal CMOS technology.

• Journal of Electrical Engineering and Technology
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• 제9권5호
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• pp.1592-1601
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• 2014

In this study, a novel single phase soft switched power factor correction (PFC) converter is developed with active snubber cell. The active snubber cell provides boost switch both to turn on with zero voltage transition (ZVT) and to turn off with zero current transition (ZCT). As the switching losses in the proposed converter are too low, L and C size can be reduced by increasing the operating frequency. Also, all the semiconductor devices operate with soft switching. There is no additional voltage stress in the boost switch and diode. The proposed converter has a simple structure, low cost and ease of control as well. It has a simple control loop to achieve near unity power factor with the aid of the UC3854. In this study, detailed steady state analysis of the proposed converter is presented and this theoretical analysis is verified by a prototype of 100 kHz and 500 W converter. The measured power factor and efficiency are 0.99 and 97.9% at full load.

• Journal of Electrical Engineering and Technology
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• 제12권4호
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• pp.1484-1494
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• 2017

We present a two-stage inverter with high step-up conversion ratio engaging modified finite-set Model Predictive Control (MPC) for utility-integrated photovoltaic (PV) applications. The anticipated arrangement is fit for low power PV uses, the calculated efficiency at 150 W input power and 19 times boosting ratio was around 94%. The suggested high-gain dc-dc converter based on Cockcroft-Walton multiplier constitutes the first-stage of the offered structure, due to its high step-up ability. It can boost the input voltage up to 20 times. The 3S current-source inverter constitutes the second-stage. The 3S current-source inverter hires three semiconductor switches, in which one is functioning at high-frequency and the others are operating at fundamental-frequency. The high-switching pulses are varied in the procedure of unidirectional sine-wave to engender a current coordinated with the utility-voltage. The unidirectional current is shaped into alternating current by the synchronized push-pull configuration. The MPC process are intended to control the scheme and achieve the subsequent tasks, take out the Maximum Power (MP) from the PV, step-up the PV voltage, and introduces low current with low Total Harmonic Distortion (THD) and with unity power factor with the grid voltage.

• 한국위성정보통신학회논문지
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• 제11권4호
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• pp.21-26
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• 2016

PPS 소자가 삽입된 N형 실리콘 제어 정류기(NSCR_PPS) 소자에서 채널차단영역의 이온주입 변화가 정전기 보호 성능에 미치는 영향을 연구하였다. 종래의 NSCR 표준소자는 on 저항, 스냅백 홀딩 전압 및 열적 브레이크다운 전압이 너무 낮아 마이크로칩의 정전기보호소자로 적용이 어려웠다. 그러나 본 연구에서 제안하는 채널 차단 영역의 이온주입 조건을 변화시켜 각각 변형설계된 소자에서는 채널 차단 이온주입이 정전기 보호성능의 향상에 영향을 주는 중요한 파라미터였으며, CPS_PDr+HNF 구조의 변형소자는 정전기보호소자의 설계창을 만족시키는 향상된 정전기보호성능을 나타내어 고전압 동작용 마이크로 칩의 정전기보호 소자로 적용 가능함을 확인하였다.