• Journal of Power Electronics
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• v.9 no.4
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• pp.593-603
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• 2009

This paper proposes and describes the design and operational principles of a three-phase three-level nine switch voltage source inverter. The proposed topology consists of three bi-directional switches inserted between the source and the full-bridge power switches of the classical three-phase inverter. As a result, a three-level output voltage waveform and a significant suppression of load harmonics contents are obtained at the inverter output. The harmonics content of the proposed multilevel inverter can be reduced by half compared with two-level inverters. A Fourier analysis of the output waveform is performed and the design is optimized to obtain the minimum total harmonic distortion. The full-bridge power switches of the classical three-phase inverter operate at the line frequency of 50Hz, while the auxiliary circuit switches operate at twice the line frequency. To validate the proposed topology, both simulation and analysis have been performed. In addition, a prototype has been designed, implemented and tested. Selected simulation and experimental results have been provided.

• Proceedings of the KIEE Conference
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• 1997.07f
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• pp.2204-2206
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• 1997

A novel zero voltage and zero current switching (ZVZCS) full bridge (FB) PWM converter with a low output current ripple is proposed. The proposed circuit improve the demerits of the previously presented ZVBCS-FB-PWM converters[5-8] such as use of lossy components or additional active switches. A simple auxiliary circuit which includes neither lossy components nor active switches provides ZVZCS conditions to primary switches, ZVS for leading-leg switches and ZCS for lagging-leg switches. In addition, this proposed circuit reduces a output current ripple considerably. Many advantages including simple circuit topology, high efficiency, low cost and low current ripple make the new converter attractive far high power (> 1kW) applications.

• Journal of Electrical Engineering and Technology
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• v.8 no.5
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• pp.1078-1085
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• 2013

This paper presents a novel topology for cascaded transformer sub-multilevel converter. Eachsub-multilevel converter consists of two DC voltage sources with six switches to achieve five-level voltage. The proposed topology results in reduction of DC voltage sources and switches number. Single phase low frequency transformers are used in proposed topology and voltage transformation and galvanic isolation between load and sources are given by transformers. This topology can operate as symmetric or asymmetric converter but in this paper we have focused on symmetric state. The operation and performance of the suggested multilevel converter has been verified by the simulation results of a single-phase nine-level multilevel converter using MATLAB/SIMULINK.

• Proceedings of the KIPE Conference
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• 1998.10a
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• pp.855-858
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• 1998

Many semiconductive switches are operated in series for high voltage operation. The same number of gate drivers are needed to control all the switches, hence, the drivers cause high cost and system complexity. In this study, a simple and low cost gate driver for high voltage thyristor diode switches is investigated. This gate driver can operate several high voltage thyristor diode switches at the same time.

• Proceedings of the KIEE Conference
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• 1998.07f
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• pp.2133-2135
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• 1998

Many semiconductive switches are operated in series for high voltage operation. The same number of gate drivers are needed to control all the switches, hence, the drivers cause high cost and system complexity. In this study, a simple and low cost gate driver for high voltage thyristor-diode switches is investigated. This gate driver can operate several high voltage thyristor-diode switches at the same time.

• Journal of Power Electronics
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• v.12 no.3
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• pp.377-386
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• 2012

An interleaved bridgeless buck-boost AC/DC converter is presented in this paper to achieve the characteristics of low conduction loss, a high power factor and low harmonic and ripple currents. There are only two power semiconductors in the line current path instead of the three power semiconductors in a conventional boost AC/DC converter. A buck-boost converter operated in the boundary conduction mode (BCM) is adopted to control the active switches to achieve the following characteristics: no diode reverse recovery problem, zero current switching (ZCS) turn-off of the rectifier diodes, ZCS turn-on of the power switches, and a low DC bus voltage to reduce the voltage stress of the MOSFETs in the second DC/DC converter. Interleaved pulse-width modulation (PWM) is used to control the switches such that the input and output ripple currents are reduced such that the output capacitance can be reduced. The voltage doubler topology is adopted to double the output voltage in order to extend the useable energy of the capacitor when the line voltage is off. The circuit configuration, principle operation, system analysis, and a design example are discussed and presented in detail. Finally, experiments on a 500W prototype are provided to demonstrate the performance of the proposed converter.

• Journal of Power Electronics
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• v.18 no.2
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• pp.375-382
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• 2018

A novel active controlled primary current cutting-off zero-voltage and zero-current switching (ZVZCS) PWM three-level dc-dc converter (TLC) is proposed in this paper. The proposed converter has some attractive advantages. The OFF voltage on the primary switches is only Vin/2 due to the series connected structure. The leading-leg switches can obtain zero-voltage switching (ZVS), and the lagging-leg switches can achieve zero-current switching (ZCS) in a wide load range. Two MOSFETs, referred to as cutting-off MOSFETs, with an ultra-low on-state resistance are used as active controlled primary current cutting-off components, and the added conduction loss can be neglected. The added MOSFETs are switched ON and OFF with ZCS that is irrelevant to the load current. Thus, the auxiliary switching loss can be significantly minimized. In addition, these MOSFETs are not series connected in the circuit loop of the dc input bus bar and the primary switches, which results in a low parasitic inductance. The operation principle and some relevant analyses are provided, and a 6-kW laboratory prototype is built to verify the proposed converter.

• Proceedings of the KIPE Conference
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• 2004.07b
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• pp.723-727
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• 2004

A new high-performance and low cost single switch energy recovery display driver for an AC plasma display panel (PDP) is proposed. Since it is composed of only one auxiliary power switch, two small inductors, and eight diodes compared with the conventional circuit consisting of four auxiliary power switches, two small inductors, eight power diodes, and two external capacitors, it features a much simpler structure and lower cost. Nevertheless, since the rootmean-square (RMS) value of the inductor current is very small, it also has very desirable advantages such as n low conduction loss and high efficiency. Furthermore, there are no serious voltage-drops caused by the large gas-discharge current with the aid of the discharge current compensation, which can also greatly reduce the current flowing through power switches and maintain the panel to light at n lower sustaining voltage. In addition, all main power switches are turned on under the zero-voltage switching (ZVS) and thus, the proposed circuit has a improved EMI, increased reliability, and high efficiency. Therefore, the proposed circuit will be well suited to the wall hanging PDP TV. To confirm the validity of the proposed circuit, circuit operations, features,and design considerations are presented and verified experimentally on a 6-inch PDP, 50kHz-switching frequency, and sustaining voltage 141V based prototype.

• Proceedings of the KIPE Conference
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• 2008.06a
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• pp.520-522
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• 2008

A novel two-switch active clamp forward converter suitable for high input voltage applications is proposed. The main advantage of the proposed converter, compared to the conventional active forward converters, is that circuit complexity is reduced and the voltage stress of the main switches is effectively clamped to either the input voltage or the clamping capacitor voltage by two clamping diodes without limiting the maximum duty ratio. Also, the clamping circuit does not include additional active switches, so a low cost can be achieved without degrading the efficiency. Therefore, the proposed converter can feature high efficiency and low cost for high input voltage applications. The operational principles, features, and design considerations of the proposed converter are presented in this paper. The validity of this study is confirmed by the experimental results from a prototype with 200W, 375V input, and 12V output.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.147-150
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• 2005

Low actuation voltage and no contact stiction are the important factors to apply MEMS RF switches to mobile devices. Conventional electrostatic MEMS RF switches require several tens of voltages for actuation. In this paper we propose PAS MEMS RF switch which adopt PZT actuators and seesaw cantilevers to meet the above requirements. The fundamental structures of PAS MEMS switch were designed, optimized, and fabricated. Through the developed processes PAS SPDT MEMS RF switches were successfully fabricated on 4" wafers and they showed good electrical properties. The driving voltage was less than 5 volts. And the insertion loss was -0.5dB and the isolation was 35dB at 5GHz. The switching speed was about 5kHz. So these MEMS RF switches can be applicable to mobile communication devices or wireless multi-media devices at lower than 6GHz.