• The Transactions of the Korean Institute of Electrical Engineers D
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• v.51 no.12
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• pp.596-603
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• 2002

New layout methods for implementing MOS switches of ultra low channel resistance are presented. These area-effective layout methods include the waffle structure, zipper structure, star zag structure and fingered waffle structure. The design equations for these new layout structures are analyzed. The area-effectiveness of these structures is compared with that of the conventional alternating bar structure. MOS switches of the waffle structure were fabricated using a standard 0.25um CMOS process. The experimental characterization results of the fabricated MOS switches are presented. The analytical comparison and experimental results show that area reductions over 40% are achievable with the new structures.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.50 no.9
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• pp.471-475
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• 2001

ln this paper, a micromachined micromechanical switch is presented. The presented switch is operated in the vertical direction to the substrate by an electrostatic force between two parallel plates. The moving plate is pulled down to connect the bumps of the bias node$(V_{DD}/ or GND)$ to the bumps of the output node when a oltage difference exists between the moving plate and the input plate. The switch was designed to operate at a low switching voltage$(\risingdotseq5V)$ by including a large-area, narrow-gap, parallel plate capacitor A theoretical analysis of the designed switch was performed in order to determine its geometry fitting the desired pull-in voltage and release voltage. The designed switch was fabricated by surface micromachining combined with Ni electroplating. From the experimental results of the fabricated switch, its pull-in voltage came Out to be less than 5V and the measured maximum allowable current was 150mA. The measured average ON-state resistance was about 8$\Omega$, and the OFF-state resistance was too high to be measured with digital multimeter.

• The Transactions of the Korean Institute of Power Electronics
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• v.21 no.2
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• pp.117-125
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• 2016

In this paper, the inverter switch losses of BLDC motor for three types of PWM methods and power devices were analyzed. When the BLDC motor is driven at low currents, the inverter switch losses for MOSFET are low because MOSFET operates like resistance. However, the inverter switch losses for IGBT are higher than MOSFET due to its large turn-off losses. Moreover, synchronous rectification switching method is adaptable because MOSFET has 2-channel. So, MOSFET can be driven with more low impedance and losses. For low power inverter with MOSFET, the power losses of unified PWM are lower than that of unipolar and bipolar PWM. Proposed method and losses analysis results are verified by examination and simulation using Matlab/Simulink.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.42 no.7 s.337
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• pp.57-62
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• 2005

This paper describes the design of a high performance microwave single pole double throw (SPDT) monolithic microwave integrated circuit switch using GaAs pHEMT process. The switch design proposes a novel coplanar waveguide (CPW) impedance transform network which results in the low insertion loss and high isolation by compensating for the FET parasitics to get the low on-resistance and low off-capacitance. The proposed switch has the measured isolation of better than 24 dB and insertion loss of less than 2.6 dB from 53 to 61 GHz. The chip is fabricated with the size of 2.2mm $\times$ 1.6 mm.

• Proceedings of the KIPE Conference
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• 2014.11a
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• pp.33-34
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• 2014

In this paper, the inverter switch losses of BLDC motor for three types of PWM method and power devices was analyzed. When BLDC motor is driven at low currents, inverter switch losses for MOSFET is low because MOSFET operates like resistance. But, inverter switch losses for IGBT is higher than MOSFET due to its large turn-off losses. For low power inverter with MOSFET, the power losses of unified PWM is lower than that of unipolar and bipolar PWM.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.45 no.2
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• pp.193-198
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• 1996

Low power superconducting persistent current switch(PCS) for the superconducting magnet systems in the persistent mode was developed and its experimental results were analyzed when the system was charged or discharged. The multifilament NbTi wire with Cu matrix was used for the PCS. The constructed NbTi superconducting switch with superconducting magnet system operated successfully. It also operated on-off switching action with good stabilization. The maximum operating current in persistent mode was 60A (at 1T). In persistent current mode, the decay of the persistent current at 60A was observed. Its decay was 3.55% in 60 min. It is possible to make the persistent current switch with the better decaying of persistent current if some problems for joint resistance are solved.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.14 no.12
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• pp.953-958
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• 2001

The antifuse is a semi-permanent memory device like a ROM which shows the open or short state, and a switch device connecting logic blocks selectively in FPGA. In addition, the antifuse has been used as a logic device to troubleshoot defective memory cells arising from SDRAM processing. In this study, we have fabricated ONO antifuses consisted of PIP structure. The antifuse shows a high resistance more than several G Ω in the normal state, and shows a low resistance less than 500 Ω after program. The program resistance variation according to temperature shows the very stable value of $\pm$20 Ω. At this time, its program voltage shows 6.7∼7.2 V and the program is performed within 1 second. Therefore this result shows that the PIP antifuse is a very stable and programmable logic device.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.21 no.2
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• pp.104-110
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• 2008

In this paper we proposed a new source-drain structure for N-type MOSFET which can suppress the output resistance reduction of a device in saturation region due to soft break down leakage at high drain voltage when the gate is biased around relatively low voltage. When a device is generally used as a switch at high gate bias the current level is very important for the operation. but in electronic circuit like an amplifier we should mainly consider the output resistance for the stable voltage gain and the operation at low gate bias. Hence with T-SUPREM simulator we designed devices that operate at low gate bias and high gate bias respectively without a extra photo mask layer and ion-implantation steps. As a result the soft break down leakage due to impact ionization is reduced remarkably and the output resistance increases about 3 times in the device that operates at the low gate bias. Also it is expected that electronic circuit designers can easily design a circuit using the offered N-type MOSFET device with the better output resistance.

• IEIE Transactions on Smart Processing and Computing
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• v.3 no.6
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• pp.425-429
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• 2014

This paper proposes a DC-DC Buck-Converter with DT-CMOS (Dynamic Threshold-voltage MOSFET) Switch. The proposed circuit was evaluated and compared with a CMOS switch by both the circuit and device simulations. The DT-CMOS switch reduced the output ripple and the conduction loss through a low on-resistance. Overall, the proposed circuit showed excellent performance efficiency compared to the converter with conventional CMOS switch. The proposed circuit has switching frequency of 1.2MHz, 3.3V input voltage, 2.5V output voltage, and maximum current of 100mA. In addition, this paper proposes a SCP (Short Circuit Protection) circuit to ensure reliability.

• Journal of Electrical Engineering and Technology
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• v.12 no.3
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• pp.1187-1194
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• 2017

In this paper, a high step-up DC-DC PWM converter with continuous input current and low voltage stress is presented for renewable energy application. The proposed converter is composed of a boost converter integrated with an auxiliary step-up circuit. The auxiliary circuit uses an additional coupled inductor and a balancing capacitor with voltage doubler and switching capacitor technique to achieve high step-up voltage gain with an appropriate switch duty cycle. The switched capacitors are charged in parallel and discharged in series by the coupled inductor, stacking on the output capacitor. In the proposed converter, the voltage stress on the main switch is clamped, so a low voltage switch with low ON resistance can be used to reduce the conduction loss which results in the efficiency improvement. A detailed discussion on the operating principle and steady-state analyses are presented in the paper. To justify the theoretical analysis, experimental results of a 200W 40/400V prototype is presented. In addition, the conducted electromagnetic emissions are measured which shows a good EMC performance.