• Title/Summary/Keyword: Low Power Noise

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A Performance Comparison of Excitation Strategies For a Low Noise SRM Drive

  • Lee Dong-Hee;Kim Tae-Hyoung;Ahn Jin-Woo
    • Journal of Power Electronics
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    • v.5 no.3
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    • pp.218-223
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    • 2005
  • A simple construction, low cost, and a fault tolerant power electronic drive have made the switched reluctance drive a strong contender for many applications. But the switched reluctance drive exhibits higher levels of vibration and acoustic noise than most competing drives. The main source of vibration in the switched reluctance drive is generated by the rapid change of radial magnetic force when the phase current is extinguished during commutation. In this paper, some excitation methods are proposed to reduce the vibration and acoustic noise of the switched reluctance drive. The excitation strategies considered in this research are 1-phase, 2-phase and hybrid excitation methods. The 1-phase method is the conventional approach, while in the 2-phase method, the two phases are excited simultaneously. The hybrid excitation has 2-phase excitation using a long dwell angle as well as conventional 1-phase excitation. The vibration and acoustic noise are compared and tested. The suggested 2-phase and hybrid strategies reduce acoustic noise because the schemes reduce the abrupt change in excitation level by using distributed and balanced excitation.

Design of a 1~10 GHz High Gain Current Reused Low Noise Amplifier in 0.18 ㎛ CMOS Technology

  • Seong, Nack-Gyun;Jang, Yo-Han;Choi, Jae-Hoon
    • Journal of electromagnetic engineering and science
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    • v.11 no.1
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    • pp.27-33
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    • 2011
  • In this paper, we propose a high gain, current reused ultra wideband (UWB) low noise amplifier (LNA) that uses TSMC 0.18 ${\mu}m$ CMOS technology. To satisfy the wide input matching and high voltage gain requirements with low power consumption, a resistive current reused technique is utilized in the first stage. A ${\pi}$-type LC network is adopted in the second stage to achieve sufficient gain over the entire frequency band. The proposed UWB LNA has a voltage gain of 12.9~18.1 dB and a noise figure (NF) of 4.05~6.21 dB over the frequency band of interest (1~10 GHz). The total power consumption of the proposed UWB LNA is 10.1 mW from a 1.4 V supply voltage, and the chip area is $0.95{\times}0.9$ mm.

Low-Phase Noise Dual-band VCO Using PBG Structure (Photonic Bandgap 구조를 이용한 저 위상잡음 듀얼밴드 VCO에 관한 연구)

  • 조용기;서철헌
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.41 no.2
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    • pp.53-58
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    • 2004
  • In this paper, the low-phase dual-band VCO, by adding switching circuit with PIN diode at feedback loop of the oscillation part having negative-resistance, is realized. In order to reduce the phase noise of the VCO, PBG structure applied to the ground plane of the resonator. When applying for PBG structure, output power is -9.17㏈m and phase noise is -102㏈c/Hz at 5.25㎓, output power is -5.17㏈m and phase noise is -101㏈c/Hz at 1.8㎓, respectively.

A Study on High Precision and High Stability Digital Magnet Power Supply Using Second Order Delta-Sigma modulation (2차 델타 시그마 변조기법을 이용한 고 정밀 및 고 안정 디지털 전자석 전원 장치에 관한 연구)

  • Kim, Kum-Su;Jang, Kil-Jin;Kim, Dong-Hee
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.29 no.3
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    • pp.69-80
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    • 2015
  • This paper is writing about developing magnet power supply. It is very important for power supply to obtain output current in high precision and high stability. As a switching noise and a power noise are the cause of disrupting the stability of output current, to remove these at the front end, low pass filter with 300Hz cutoff frequency is designed and placed. And also to minimize switching noise of the current into magnet and to stop abrupt fluctuations, output filter should be designed, when doing this, we design it by considering load has high value inductance. As power supply demands the stability of less than 5ppm, high precision 24bit(300nV/bit) analog digital converter is needed. As resolving power of 24bit(300nV/bit) analog digital converter is high, it is also very important to design the input stage of analog digital converter. To remove input noise, 4th order low pass filter is composed. Due to the limitation of clock, to minimize quantization error between 15bit DPWM and output of ADC having 24bit resolving power, ${\Sigma}-{\Delta}$ modulation is used and bit contracted DPWM is constituted. And before implementing, to maximize efficiency, simulink is used.

A Method of Designing Low-power Feedback Active Noise Control Filter for Headphones/Earphones (헤드폰/이어폰을 위한 저전력 피드백 능동 소음 제어 필터 설계 방법)

  • Seo, Ji-ho;Youn, Dae-Hee;Park, Young-Cheol
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.10 no.1
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    • pp.57-65
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    • 2017
  • This paper presented a method of designing low-power feedback active noise control filter optimized for headphones/earphones. Using constrained optimization, we obtained a high order FIR noise control filter to ensure reasonable noise attenuation performance at high sampling frequency environment. Then using infinite impulse response (IIR) approximation method called Balanced Model Truncation (BMT), we obtained a low order IIR noise control filter suitable for low-power digital signal processing system like headphones/earphones. For further performance improvement, we utilized frequency warping method so that we could obtain more accurately approximated IIR filter and we ensured system stability by reconstructing the low order IIR filter in form of cascaded second order IIR filters. ANC simulation with white noise and stability test verified that the proposed algorithm had superior attenuation performance and better robustness compared to the conventional algorithm.

Minimum Statistics-Based Noise Power Estimation for Parametric Image Restoration

  • Yoo, Yoonjong;Shin, Jeongho;Paik, Joonki
    • IEIE Transactions on Smart Processing and Computing
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    • v.3 no.2
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    • pp.41-51
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    • 2014
  • This paper describes a method to estimate the noise power using the minimum statistics approach, which was originally proposed for audio processing. The proposed minimum statistics-based method separates a noisy image into multiple frequency bands using the three-level discrete wavelet transform. By assuming that the output of the high-pass filter contains both signal detail and noise, the proposed algorithm extracts the region of pure noise from the high frequency band using an appropriate threshold. The region of pure noise, which is free from the signal detail part and the DC component, is well suited for minimum statistics condition, where the noise power can be extracted easily. The proposed algorithm reduces the computational load significantly through the use of a simple processing architecture without iteration with an estimation accuracy greater than 90% for strong noise at 0 to 40dB SNR of the input image. Furthermore, the well restored image can be obtained using the estimated noise power information in parametric image restoration algorithms, such as the classical parametric Wiener or ForWaRD image restoration filters. The experimental results show that the proposed algorithm can estimate the noise power accurately, and is particularly suitable for fast, low-cost image restoration or enhancement applications.

Bi-directional Photovoltaic Inverter with High Efficiency and Low Noise (고 효율, 저 잡음 특성을 가지는 양방향 태양광 인버터)

  • Lee, Sung-Ho;Kwon, Jung-Min;Kwon, Bong-Hwan
    • The Transactions of the Korean Institute of Power Electronics
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    • v.17 no.6
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    • pp.539-545
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    • 2012
  • Due to merits cost and efficiency, the transformer-less type photovoltaic (PV) inverters have been popularized in the solar market. However, the leakage current flowing through a parasitic capacitor between PV array and ground can cause adverse effect in the transformer-less PV system. In this paper, a bi-directional PV inverter with high efficiency and low noise is proposed for the PV system with an energy storage device. The proposed inverter is a transformer-less type and performs the bi-directional power control between dc sources and grid with high efficiency. In addition, the proposed inverter can suppress the leakage current and obtain low noise characteristic. Finally, 3-kW prototype was implemented to confirm validity of the proposed inverter.

Design of an Ultra Low Power CMOS 2.4 GHz LNA (초 저전력 CMOS 2.4 GHz 저잡음 증폭기 설계)

  • Jang, Yo-Han;Choi, Jae-Hoon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.9
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    • pp.1045-1049
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    • 2010
  • In this paper, we proposed an ultra-low power low noise amplifier(LNA) using a TSMC 0.18 ${\mu}m$ RF CMOS process. To satisfy the low power consumption with high gain, a current-reused technique is utilized. In addition, a low bias voltage in the subthreshold region is utilized to achieve ultra low power characteristic. The designed LNA has the voltage gain of 13.8 dB and noise figure(NF) of 3.4 dB at 2.4 GHz. The total power consumption of the designed LNA is only 0.63 mW from 0.9 V supply voltage and chip occupies $1.1\;mm{\times}0.8\;mm$ area.

The Field Applica1ion of The 154[kV] low Noise Transformers (154[kV] 저소음 변압기의 현장적용)

  • Kweon, Dong-Jin;Koo, Kyo-Sun;Woo, Jung-Wook
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.23 no.8
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    • pp.124-129
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    • 2009
  • Recently, there has been a growing global interest in environmental conservation, and the field of electric power equipment has been working to become more environment-friendly. Accordingly the 154[kV] low noise transformer is developed through the research. The low noise transformer decreases the audible noise level but the low noise transformer has several changes in the increase of weight and volume and the application of rubber damper. Therefore it is necessary to inspect the test, transportation, installation and operation about field application. In this paper, we investigate the standards of the audible noise level, the weight and volume of the transportation, the installation space and operation in order for effective field application.

A Study on the Design of the Low Noise Amplifier for 2.4GHz wireless LAN using LICC Passive Components (LTCC 적층소자를 이용한 2.4GHz 무선랜 대역 LNA의 설계에 관한 연구)

  • Oh, Jae-Wook;Kim, Hyeong-Seok;Chung, Tae-Kyung
    • Proceedings of the KIEE Conference
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    • 2006.07c
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    • pp.1599-1600
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    • 2006
  • In this paper, a small size, $7{\times}6\;mm^2$, Low Noise Amplifier(LNA) using LTCC process was fabricated with multi-layer structure for 2.4GHz wireless LAN. The measured results demonstrate that the bandwidth is 130 MHz, and the operating frequency is from 2.39GHz to 2.52GHz. The power gain is above 7.3 dB in the operating frequency range and the gain flatness is 0.5 dB. The maximum S11 is -4 dB and the maximum S22 is -7.5 dB. The noise figure is less than 1.83 dB. The measured power gain, S11 and S22 were had poorer performance than the simulation results. The reason for this discrepancy is that the input and output matching was not performed exactly. However, the noise figure of the LTCC low noise amplifier is better than simulation result. It is found that it is possible to fabricate a LTCC low noise amplifier in a small size.

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