• The Journal of The Korea Institute of Intelligent Transport Systems
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• v.11 no.5
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• pp.89-96
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• 2012

In this paper, a low phase noise oscillator is designed using an interdigital hairpin resonator for UTIS (Urban Traffic Information Systems). The interdigital hairpin resonator has several characteristics compared with a conventional hairpin resonator, which are 70% size reduction and improvement of harmonic characteristics. In addition, Q (Quality factor) of the interdigital hairpin resonator is about 132, which is suitable for the design of a low phase noise oscillator. The oscillator suggested in this paper shows the output power of 12 dBm and the phase noise characteristic of -100.8 dBc/Hz at 100 kHz offset frequency from the center frequency of 5.75 GHz. The phase noise is improved by about 12 dB compared with a conventional oscillator using an interdigital hairpin resonator.

• ETRI Journal
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• v.34 no.4
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• pp.518-526
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• 2012

This paper proposes LC voltage-controlled oscillator (VCO) phase-locked loop (PLL) and ring-VCO PLL topologies with low-phase noise. Differential control loops are used for the PLL locking through a symmetrical transformer-resonator or bilaterally controlled varactor pair. A differential compensation mechanism suppresses out-band spurious tones. The prototypes of the proposed PLL are implemented in a CMOS 65-nm or 45-nm process. The measured results of the LC-VCO PLL show operation frequencies of 3.5 GHz to 5.6 GHz, a phase noise of -118 dBc/Hz at a 1 MHz offset, and a spur rejection of 66 dBc, while dissipating 3.2 mA at a 1 V supply. The ring-VCO PLL shows a phase noise of -95 dBc/Hz at a 1 MHz offset, operation frequencies of 1.2 GHz to 2.04 GHz, and a spur rejection of 59 dBc, while dissipating 5.4 mA at a 1.1 V supply.

• Journal of Electrical Engineering and Technology
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• v.4 no.2
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• pp.255-265
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• 2009

This paper presents the acoustic noise and mechanical vibration reduction of a coreless brushless DC motor with an air dynamic bearing used in a digital lightening processor. The coreless brushless DC motor does not have a stator yoke or stator slot to remove the unbalanced force caused by the interaction between the stator yoke and the rotor magnet. An unbalanced force makes slotless brushless DC motors vibrate and mechanically noisy, and the attractive force between the magnet and the stator yoke increases power consumption. Also, when a coreless brushless DC motor is driven by a $120^{\circ}$ conduction type inverter, high frequency acoustic noise occurs because of the peak components of the phase currents caused by small phase inductance and large phase resistance. In this paper, a core-less brushless DC motor with an air dynamic bearing to remove mechanical vibration and to reduce power consumption is applied to a digital lightening processor. A $180^{\circ}$ conduction type inverter drives it to reduce high frequency acoustic noise. The applied methods are simulated and tested using a manufactured prototype motor with an air dynamic bearing. The experimental results show that a coreless brushless DC motor has characteristics of low power consumption, low mechanical vibration, and low high frequency acoustic noise.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.11
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• pp.1074-1080
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• 2013

The low phase noise and wideband frequency synthesizer has been designed by using YTO. Offset PLL structure is used for reducing a division ratio of feedback loop. The phase noise modeling is applied to optimize loop filter of PLL and YTO module. And DDS is used as reference signal of frequency synthesizer for fine resolution. The fabricated wideband frequency synthesizer has the output frequency of 3.2 GHz to 6.8 GHz, phase noise of -107 dBc/Hz at 10 kHz offset from the carrier and frequency resolution of 1 Hz. The measured phase noise is well agreed with the simulated one.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.3
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• pp.269-281
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• 2014

In this paper, a systematic design of a low phase noise voltage-tuned dielectric resonator oscillator(VTDRO) using loop group delay is proposed. Designed VTDRO is closed-loop type and consists of a cascade connection of a resonator, phase shifter, and amplifier. Firstly, a reference VTDRO is fabricated and its phase noise and electrical frequency tuning range are measured. Both the phase noise and electrical frequency tuning range depend on the loop group delay. Then, a required value of loop group delay for a new VTDRO with a low phase noise can be systematically computed. In addition, its phase noise and electrical frequency tuning range can be theoretically estimated using those obtained from the measurement of the reference VTDRO. When the loop group delay increases, the phase noise decreases and the electrical frequency tuning range also decreases. The former predominantly depends on the resonator structure. Therefore we propose a systematic design procedure of a resonator with high group delay characteristics. The measured loop group delay of the new VTDRO is about 700 nsec. The measured phase noise of the new VTDRO show a state-of-the-art performance of 154.5 dBc/Hz at 100 kHz frequency offset and electrical frequency tuning range of 448 kHz for a voltage change of 0~10V. The oscillation power is about 4.39 dBm.

• Journal of Satellite, Information and Communications
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• v.5 no.1
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• pp.17-21
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• 2010

In this paper, we have introduced a new way to design low phase noise PLL which can apply to the Ultra wideband as meeting performance requirements based on structure improvement, circuit supplement, upgraded design method. Before development of the PLL, we simulated spectrum power, phase noise, harmonic characteristic by using ADS(Advanced Designed System). And, we compared result between measurement and simulation. Finally, we confirm a satisfying result which meet performance requirements between required standard and measured value. It will be useful for transceiver of service which operate in Ultra wideband.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.27 no.2C
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• pp.191-200
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• 2002

A frequency synthesizer that can be used in IMT-2000 was designed and fabricated using dual loop PLL(Phase Locked Loop) in this paper. For improving phase noise characteristic two loops, reference loop and main loop, were divided. Phase noise was improved by transformed clamp type voltage controled oscillator and optimizing loop bandwidth in reference loop. And voltage controlled oscillator open loop gain in main loop. Fabricated the frequency synthesizer had 1.81GHz center frequency, 160MHz tuning range, 13.5dBm output power and -119.73dBc/Hz low phase noise characteristic.

• The Journal of the Korea institute of electronic communication sciences
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• v.9 no.1
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• pp.17-24
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• 2014

In this paper, we analysed coupling coefficient between dielectric resonator of high dielectric constant and microstrip line to design for low phase noise dielectric resonator by direct coupling. Also we analysed phase noise of dielectric resonance oscillator with parallel feedback circuit to complement Q by high dielectric constant. We obtained a result from high-stability dielectric oscillator which is optimum designed through analysis of dielectric resonance oscillator phase noise and coupling coefficient. The result is that the phase noise was -83.3dBc/Hz@1KHz at 20.25GHz when we used about 3.6 coupling coefficient and ${\epsilon}_r$=30 dielectric resonator of 20.25GHz dielectric resonance oscillator. As a result, we suggested the direct-connect design method by frequency multiplication mode to prevent phase noise loss at K-Band.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.11 no.3
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• pp.452-458
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• 2007

Since there are very strong clutter returns in an airborne weather radar used for the detection of low altitude weather hazards, the reliable weather data cannot be extracted from the weak Doppler weather signal without cancellation of these strong clutter returns. However, the system phase noise spreads both the clutter and Doppler signal and causes the serious problems in the efficient clutter cancellation. Therefore, in this paper, the phase noise effects on the clutter and Doppler weather signal were analyzed. The system phase noise model was suggested and the effects were derived and explained using this phase noise model. It can be shown that there exists the limit in the clutter cancellation capability to improve the signal-to-clutter ratio (SCR) due to the system phase noise. It may be prominent especially in the low SCR situations.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.2
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• pp.19-22
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• 2014

In this paper, Ku-band low phase noise oscillator using DSRR structure resonator based on metamaterial was proposed. To improve the phase noise of the oscillator, the proposed resonator consist of a DSRR strcuture based on metamaterial. The proposed resonator have a characteristic of $S_{11}$ is -0.25 dB, and $S_{21}$ in -44.59 dB at 14.67 GHz, respectively. At 14.67 GHz, the proposed Ku-band low phased oscillator achieves a output power of 2.03 dBm, $2^{nd}$ harmonic of -36.04 dBc, and phase noise of -130.63 dBc at the 100 kHz offset, respectively.