• Title/Summary/Keyword: Low Noise Amplifier

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A Low Power CMOS Low Noise Amplifier for UWB Applications (UWB용 저전력 CMOS 저잡음 증폭기 설계)

  • Lhee, Jeong-Han;Oh, Nam-Jin
    • Proceedings of the IEEK Conference
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    • 2008.06a
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    • pp.545-546
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    • 2008
  • This paper presents a low power CMOS low noise amplifier for UWB applications. To reduce the power consumption, two cascode amplifiers was stacked in DC. Designed with $0.18-{\mu}m$ CMOS technology, the proposed LNA achieves 20dB flat gain, below 3dB noise figure, and the power consumption of 5.2mW from a 1.8 V supply voltage.

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The Design of A 1.9 GHz CMOS RF Bandpass Amplifier (1.9GHz CMOS RF 대역통과 증폭기의 설계)

  • 류재우;주홍일유상
    • Proceedings of the IEEK Conference
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    • 1998.10a
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    • pp.1121-1124
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    • 1998
  • A CMOS RF bandpass amplifier which performs both functions of low-noise amplifier and bandpass filter is designed for the application of 1.9 ㎓ RF front-end in wireless receivers. The positive-feedback Q-enhancement technique is used to overcome the low gain and low Q factor of the bandpass amplifier. The designed bandpass amplifier is simulated with HSPICE and fabricated using HYUNDAI $0.8\mu\textrm{m}$ CMOS 2-poly 2-metal full custom process. Under 3 V supply voltage, results of simulation show that the CMOS bandpass amplifier provides the power gain 23dB, noise figure 3.8 dB, and power dissipation 55mW.

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An Ultra Wideband Low Noise Amplifier in 0.18 μm RF CMOS Technology

  • Jung Ji-Hak;Yun Tae-Yeoul;Choi Jae-Hoon
    • Journal of electromagnetic engineering and science
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    • v.5 no.3
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    • pp.112-116
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    • 2005
  • This paper presents a broadband two-stage low noise amplifier(LNA) operating from 3 to 10 GHz, designed with 0.18 ${\mu}m$ RF CMOS technology, The cascode feedback topology and broadband matching technique are used to achieve broadband performance and input/output matching characteristics. The proposed UWB LNA results in the low noise figure(NF) of 3.4 dB, input/output return loss($S_{11}/S_{22}$) of lower than -10 dB, and power gain of 14.5 dB with gain flatness of $\pm$1 -dB within the required bandwidth. The input-referred third-order intercept point($IIP_3$) and the input-referred 1-dB compression point($P_{ldB}$) are -7 dBm and -17 dBm, respectively.

Millimeter-Wave High-Linear CMOS Low-Noise Amplifier Using Multiple-Gate Transistors

  • Kim, Ji-Hoon;Choi, Woo-Yeol;Quraishi, Abdus Samad;Kwon, Young-Woo
    • ETRI Journal
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    • v.33 no.3
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    • pp.462-465
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    • 2011
  • A millimeter-wave (mm-wave) high-linear low-noise amplifier (LNA) is presented using a 0.18 ${\mu}m$ standard CMOS process. To improve the linearity of mm-wave LNAs, we adopted the multiple-gate transistor (MGTR) topology used in the low frequency range. By using an MGTR having a different gate-source bias at the last stage of LNAs, third-order input intercept point (IIP3) and 1-dB gain compression point ($P_{1dB}$) increase by 4.85 dBm and 4 dBm, respectively, without noise figure (NF) degradation. At 33 GHz, the proposed LNAs represent 9.5 dB gain, 7.13 dB NF, and 6.25 dBm IIP3.

A Study on the Design of Concurrent Dual Band Low Noise Amplifier for Dual Band RFID Reader (이중 대역 RFID 리더에 적용 가능한 Concurrent 이중 대역 저잡음 증폭기 설계 연구)

  • Oh, Jae-Wook;Lim, Tae-Seo;Kim, Hyeong-Seok
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.56 no.4
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    • pp.761-767
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    • 2007
  • In this paper, we deal wih a concurrent dual band low noise amplifier for a Radio Frequency Identification(RFID) reader operating at 912MHz and 2.45GHz. The design of the low noise amplifier is based on the TSMC $0.18{\mu}m$ CMOS technology. The chip size is $1.8mm\times1.8mm$. To improve the noise figure of the circuit, SMD components and a bonding wire inductor are applied to input matching. Simulation results show that the 521 parameter is 11.41dB and 9.98dB at 912MHz and 2.45GHz, respectively The noise figure is also determined to 1.25dB and 3.08dB at the same frequencies with a power consumption of 8.95mW.

Design and Fabrication of two-stage Low Noise Amplifier for 24GHz (24GHz 2단 저잡음 증폭기의 설계 및 제작)

  • 조현식;박창현;김장구;강상록;한석균;최병하
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2003.10a
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    • pp.304-308
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    • 2003
  • In this paper, two-stage low noise amplifier(LNA) for 24GHz is designed and fabricated using NE450284C HJ-FET of NEC CO. In order to get noise figure and input VSWR to be wanted, it is considered input VSWR and noise figure simultaneously in matching-circuit designing. The fabricated two-stage low noise amplifier has the gain of 16.6dB, input VSWR of 1.6, and output VSWR under 1.5.

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A 30 GHz Band Low Noise for Satellite Communications Payload using MMIC Circuits (MMIC 회로를 이용한 위성중계기용 30GHz대 저잡음증폭기 모듈 개발)

  • 염인복;김정환
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.11 no.5
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    • pp.796-805
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    • 2000
  • A 30GHz band low noise amplifier module, which has linear gain of 30dB and noise figure of 2.6dB, for 30GHz satellite communication transponder was developed by use of MMIC and thin film MIC technologies. Two kinds of MMIC circuits were used for the low noise amplifier module, the first one is ultra low noise MMIC circuit and the other is wideband and high gain MMIC circuit. The pHEMT technology with 0.15$mu extrm{m}$ of gate length was applied for MMIC fabrication. Thin film microstrip lines on alumina substrate were used to interconnect two MMIC chips, and the thick film bias circuit board were developed to provide the stabilized DC bias. The input interface of the low noise amplifier module was designed with waveguide type to receive the signal from antenna directly, and the output port was adopted with K-type coaxial connector for interface with the frequency converter module behind the low noise amplifier module. Space qualified manufacturing processes were applied to manufacture and assemble the low noise amplifier module, and space qualification level of environment tests including thermal and vibration test were performed for it. The developed low noise amplifier was measured to show 30dB of minimum gain, $\pm$0.3dB of gain flatness, and 2.6dB of maximum noise figure over the desired operating frequency range from 30 to 31 GHz.

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A Graphical Design Method for an Optimum Low-Noise Amplifier (최적의 성능을 위한 저잡음 증폭기의 도식적 설계기법)

  • Han, Sok-Kyun;Choi, Byung-Ha
    • Journal of Advanced Navigation Technology
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    • v.6 no.4
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    • pp.312-317
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    • 2002
  • This paper presents a graphical design method for a low noise amplifier using the match circles plotted in the ${\Gamma}_{IN}$ plane on the smith chart. Each circle would be useful for reducing some trial and error efforts resulting from making a trade-off for an optimized performance of a single stage amplifier. A design example is presented to illustrate the design procedure.

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A VHF/UHF-Band Variable Gain Low Noise Amplifier for Mobile TV Tuners (모바일 TV 튜너용 VHF대역 및 UHF 대역 가변 이득 저잡음 증폭기)

  • Nam, Ilku;Lee, Ockgoo;Kwon, Kuduck
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.12
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    • pp.90-95
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    • 2014
  • This paper presents a VHF/UHF-band variable gain low noise amplifier for multi-standard mobile TV tuners. A proposed VHF-band variable gain amplifier is composed of a resistive shunt-feedback low noise amplifier to remove external matching components, a single-to-differential amplifier with input PMOS transcoductors to improve low frequency noise performance, a variable shunt-feedback resistor and an attenuator to control variable gain range. A proposed UHF-band variable gain amplifier consists of a narrowband low noise amplifier with capacitive tuning to improve noise performance and interference rejection performance, a single-to-differential with gm gain control and an attenuator to adjust gain control range. The proposed VHF-band and UHF-band variable gain amplifier were designed in a $0.18{\mu}m$ RF CMOS technology and draws 22 mA and 17 mA from a 1.8 V supply voltage, respectively. The designed VHF-band and UHF-band variable gain amplifier show a voltage gain of 27 dB and 27 dB, a noise figure of 1.6-1.7 dB and 1.3-1.7 dB, OIP3 of 13.5 dBm and 16 dBm, respectively.

A MedRadio-Band Low Power Low Noise Amplifier for Medical Devices (의료기기용 MedRadio 대역 저전력 저잡음 증폭기)

  • Kim, Taejong;Kwon, Kuduck
    • Journal of the Institute of Electronics and Information Engineers
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    • v.53 no.9
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    • pp.62-66
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    • 2016
  • This paper presents a MedRadio-band low power low noise amplifier for Medical Devices. A proposed MedRadio-band low power low noise amplifier adopts a current-reuse resistive feedback topology to increase overall gm and reduce power consumption. The gain of the LNA increases by the Q-factor of the additional series RLC input matching network, and its noise figure is minimized by the similar factor. Furthermore, it consumes low power because of low supply voltage and current reuse technique. By exploiting the $g_m$-booting and matching network property, the proposed MedRadio-band low noise amplifier achieves a noise figure of 0.85 dB, a voltage gain of 30 dB, and IIP3 of -7.9 dBm while consuming 0.18 mA from a 1 V supply voltage in $0.13{\mu}m$ CMOS technology.