A Study on the Design of Concurrent Dual Band Low Noise Amplifier for Dual Band RFID Reader

이중 대역 RFID 리더에 적용 가능한 Concurrent 이중 대역 저잡음 증폭기 설계 연구

  • Published : 2007.04.01

Abstract

In this paper, we deal wih a concurrent dual band low noise amplifier for a Radio Frequency Identification(RFID) reader operating at 912MHz and 2.45GHz. The design of the low noise amplifier is based on the TSMC $0.18{\mu}m$ CMOS technology. The chip size is $1.8mm\times1.8mm$. To improve the noise figure of the circuit, SMD components and a bonding wire inductor are applied to input matching. Simulation results show that the 521 parameter is 11.41dB and 9.98dB at 912MHz and 2.45GHz, respectively The noise figure is also determined to 1.25dB and 3.08dB at the same frequencies with a power consumption of 8.95mW.

Keywords

References

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