• Title/Summary/Keyword: Low Drop Out Regulator

Search Result 28, Processing Time 0.019 seconds

Design of a LDO regulator with a protection Function using a 0.35 µ BCD process (0.35 ㎛ BCD 공정을 이용한 보호회로 기능이 추가된 모바일용 LDO 레귤레이터)

  • Lee, Min-Ji;Son, Hyun-Sik;Park, Young-Soo;Song, Han-Jung
    • Journal of the Korea Academia-Industrial cooperation Society
    • /
    • v.16 no.1
    • /
    • pp.627-633
    • /
    • 2015
  • We designed of a LDO regulator with a OVP and UVLO protection function for a PMIC. Proposed LDO regulator circuit consists of a BGR reference circuit, an error amplifier and a power transistor and so on. The proposed LDO regulator is designed for low voltage input power protection. Proposed LDO circuit generated fixed 2.5 V from a supply of 3.3V. It was designed with 3.3 V power supply using a $0.35{\mu}m$ CMOS technology. SPICE simulation results showed that the proposed circuit provides 0.713 mV/V line regulation with output 2.5 V ~ 3.9 V and $8.35{\mu}V/mA$ load regulation with load current 0 mA to 40 mA.

A Class E Power Oscillator for 6.78-MHz Wireless Power Transfer System

  • Yang, Jong-Ryul
    • Journal of Electrical Engineering and Technology
    • /
    • v.13 no.1
    • /
    • pp.220-225
    • /
    • 2018
  • A class E power oscillator is demonstrated for 6.78-MHz wireless power transfer system. The oscillator is designed with a class E power amplifier to use an LC feedback network with a high-Q inductor between the input and the output. Multiple capacitors are used to minimize the variation of the oscillation frequency by capacitance tolerance. The gate and drain bias voltages with opposite characteristics to make the frequency shift of the oscillator are connected in a resistance distribution circuit located at the output of the low drop-out regulator and supplied bias voltages for class E operation. The measured output of the class E power oscillator, realized using the co-simulation, shows 9.2 W transmitted power, 6.98 MHz frequency and 86.5% transmission efficiency at the condition with 20 V $V_{DS}$ and 2.4 V $V_{GS}$.

The Design of DC-DC Converter with Green-Power Switch and DT-CMOS Error Amplifier (Green-Power 스위치와 DT-CMOS Error Amplifier를 이용한 DC-DC Converter 설계)

  • Koo, Yong-Seo;Yang, Yil-Suk;Kwak, Jae-Chang
    • Journal of IKEEE
    • /
    • v.14 no.2
    • /
    • pp.90-97
    • /
    • 2010
  • The high efficiency power management IC(PMIC) with DTMOS(Dynamic Threshold voltage MOSFET) switching device and DTMOS Error Amplifier is presented in this paper. PMIC is controlled with PWM control method in order to have high power efficiency at high current level. Dynamic Threshold voltage CMOS(DT-CMOS) with low on-resistance is designed to decrease conduction loss. The control parts in Buck converter, that is, PWM control circuits consist of a saw-tooth generator, a band-gap reference circuit, an DT-CMOS error amplifier and a comparator circuit as a block. the proposed DT-CMOS Error Amplifier has 72dB DC gain and 83.5deg phase margin. also Error Amplifier that use DTMOS more than CMOS showed power consumption decrease of about 30%. DC-DC converter, based on Voltage-mode PWM control circuits and low on-resistance switching device is achieved the high efficiency near 96% at 100mA output current. And DC-DC converter is designed with Low Drop Out regulator(LDO regulator) in stand-by mode which fewer than 1mA for high efficiency.

A Design of Ultra-low Noise LDO Regulator for Low Voltage MEMS Microphones (저전압 MEMS 마이크로폰용 초저잡음 LDO 레귤레이터 설계)

  • Moon, Jong-il;Nam, Chul;Yoo, Sang-sun
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
    • /
    • 2021.10a
    • /
    • pp.630-633
    • /
    • 2021
  • Microphones can convert received voice signals to electric signals. They have been widely used in various industries such as radios, smart devices and vehicles. Recently, the demands for small size and high sensitive microphones are increased according to the minimization of wireless earphone with the development of smart phone. A MEMS system is a good candidate for an ultra-small size microphone of a next generation and a read out IC for high sensitive MEMS sensor is researched from many industries and academies. Since the microphone system has a high sensitivity from environment noise and electric system noise, the system requires a low noise power supply and some low noise design techniques. In this paper, a low noise LDO is presented for small size MEMS microphone systems. The input supply voltage of the LDO is 1.5-3.6V, and the output voltage is 1.3V. Then, it can support to 5mA in the light load condition. The integrated output noise of proposed LDO form 20Hz to 20kHz is about 1.9uV. These post layout simulation results are performed with TSMC 0.18um CMOS technology and the size of layout is 325㎛ × 165㎛.

  • PDF

A Photovoltaic Power Management System using a Luminance-Controlled Oscillator for USN Applications

  • Jeong, Ji-Eun;Bae, Jun-Han;Lee, Jinwoong;Lee, Caroline Sunyong;Chun, Jung-Hoon;Kwon, Kee-Won
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • v.13 no.1
    • /
    • pp.48-57
    • /
    • 2013
  • This paper presents a power management system of the dye-sensitized solar cell (DSSC) for ubiquitous sensor network (USN) applications. The charge pump with a luminance-controlled oscillator regulates the load impedance of the DSSC to track the maximum power point (MPP) under various light intensities. The low drop-out regulator with a hysteresis comparator supplies intermittent power pulses that are wide enough for USN to communicate with a host transponder even under dim light conditions. With MPP tracking, approximately 50% more power is harvested over a wide range of light intensity. The power management system fabricated using $0.13{\mu}m$ CMOS technology works with DSSC to provide power pulses of $36{\mu}A$. The duration of pulses is almost constant around $80{\mu}s$ (6.5 nJ/pulse), while the pulse spacing is inversely proportional to the light intensity.

CMOS Interconnect Electronics Architecture for Reliable and Scalable Quantum Computer (확장성 신뢰성 갖춘 양자 컴퓨터를 위한 CMOS 기반 제어 및 센싱 회로 기술)

  • Jusung Kim;Junghwan Han;Jae-Won Nam;Kunhee Cho
    • Journal of IKEEE
    • /
    • v.27 no.1
    • /
    • pp.12-18
    • /
    • 2023
  • The current circuit technology that individually connects each qubit to a control circuit at room temperature has limitations in achieving scalability and reliability of a quantum computer. With the advent of cryogenic CMOS interconnect electronics, it is expected to dramatically improve the interconnect complexity, system reliability and size, and price. In this paper, we introduce the CMOS integrated sensing and control technology platform overcoming the problems caused by the fragile and sensitive characteristics of qubit.

Improving the Light-Load Efficiency of a LDO-Embedded DC-DC Buck Converter Using a Size Control Method of the Power-Transistor (파워 트랜지스터 사이즈 조절 기법을 이용한 LDO 내장형 DC-DC 벅 컨버터의 저부하 효율 개선)

  • Kim, Hyojoong;Wee, Jaekyung;Song, Inchae
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.52 no.3
    • /
    • pp.59-66
    • /
    • 2015
  • In this paper, we propose a method of improving the light-load efficiency of DC-DC buck converter using 4bit SAR-ADC (Successive Approximation ADC) for a LDO or a power transistor size selection technique. The proposed circuit selects power transistor sizes depending on load current so that improves the light-load efficiency of the DC-DC buck converter. For this, we select the power transistor size with a cross point of the switching loss and the conduction loss. Also, when the IC operates in standby mode or sleep mode, a LDO mode is selected for improving the efficiency. The proposed circuit selects power transistor sizes(X1, X2, X4, X8) with 4 bits and its efficiency is higher about the maximum of 25% at the light-load than that of a single transistor size. Input voltage and output voltage are 5V and 3.3V for maximum load currents of 500mA.

High Efficiency Magnetic Resonance Wireless Power Transfer System and Battery Charging Chip (자기 공진 방식의 고효율 무선 전력 전송 시스템 및 배터리 충전 칩)

  • Youn, Jin Hwan;Park, Seong Yeol;Choi, Jun Rim
    • Journal of the Institute of Electronics and Information Engineers
    • /
    • v.52 no.6
    • /
    • pp.43-49
    • /
    • 2015
  • In this paper, we propose enhanced wireless power transfer system based on magnetic resonance for portable electronic device charging. Resonators were designed and fabricated for efficiency improvement and miniaturization through electromagnetism simulation using HFSS(High Frequency Structure Simulator). Impedance matching network is employed to minimize reflections that is caused by difference between input impedance and output impedance. Receiver IC that consist of rectifier and Low Drop Out(LDO) regulator were designed and fabricated to reduce power loss. This chip is implemented in $0.35{\mu}m$ BCD technology. A maximum overall efficiency of 73.8% is determined for the system through experimental verification.