• Title/Summary/Keyword: Low Delay

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Time delay control with state feedback for azimuth motion of the frictionless positioning device

  • Jeong, Ho-Seop;Lee, Chong-Won
    • 제어로봇시스템학회:학술대회논문집
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    • 1996.10a
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    • pp.385-388
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    • 1996
  • A time delay controller with state feedback is proposed for azimuth motion control of the frictionless positioning device which is subject to the variations of inertia in the presence of measurement noise. The time delay controller, which is combined with a low-pass filter to attenuate the effect of measurement noise, ensures the asymptotic stability of the closed loop system. It is found that the low-pass filter tends to increase the robustness in the design of time delay controller as well as the gain and phase margins of the closed loop system. Numerical and experimental results support that the proposed controller guarantees a good tracking performance irrespective of the variation of inertia and the presence of measurement noise.

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An Enhanced Time Delay Observer for Nonlinear Systems

  • Park, Suk-Ho;Chang, Pyung-Hun
    • Transactions on Control, Automation and Systems Engineering
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    • v.2 no.3
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    • pp.149-156
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    • 2000
  • Time delay observer (TDO), thanks to the time delay control (TDC) concept, requires little knowledge of a plant model, and hence is easy to design, robust to parameter variation and computationally efficient, yet can reconstruct states rather reliable for nonlinear plant. In this paper, we propose an improved version of TDO that solves two problems inherent in TDO as follows: TDO displays large reconstruction errors due to low-frequency uncertainty and has some restrictions on selecting its gains. By introducing a low pass filter and a state associated with it, we obtain an enhanced time delay observer (ETDO). This observer turns out to have smaller reconstruction errors than those of TDO and not to have any restriction on selecting its gains, thereby solving the problems. Through performance comparison by transfer function and simulation, we validate the analysis results of two observers (TDO and ETDO) and evaluate the performances. Finally, through experiments on BLDC motor system, the analysis results are clearly conformed.

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QoS Guaranteed System for Multi-functional VoIP End Terminal (복합 기능 VoIP 단말을 위한 음성 품질 보장 시스템)

  • 김대호
    • Proceedings of the IEEK Conference
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    • 2003.11c
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    • pp.153-156
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    • 2003
  • In this paper, we propose QoS guarantee system fur multi-functional VoIP end Terminal. This system guarantees low delay of voice data for Internet telephony in VoIP end terminal that has various kinds of Internet dependant application. QoS system we propose support low delay transmission in VoIP terminal interface.

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A Low-N Phase Locked Loop Clock Generator with Delay-Variance Voltage Converter and Frequency Multiplier (낮은 분주비의 위상고정루프에 주파수 체배기와 지연변화-전압 변환기를 사용한 클럭 발생기)

  • Choi, Young-Shig
    • Journal of the Institute of Electronics and Information Engineers
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    • v.51 no.6
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    • pp.63-70
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    • 2014
  • A low-N phase-locked loop clock generator with frequency multiplier is proposed to improve phase noise characteristic. Delay-variance voltage converter (DVVC) generates output voltages according to the delay variance of delay stages in voltage controlled oscillator. The output voltages of average circuit with the output voltages of DVVC are applied to the delay stages in VCO to reduce jitter. The HSPICE simulation of the proposed phase-locked loop clock generator with a $0.18{\mu}m$ CMOS process shows an 11.3 ps of peak-to-peak jitter.

V$_{GS}-V_{TH}$ scaling for low power CMOS circuit (저전력 CMOS 회로를 위한 V$_{GS}-V_{TH}$ 스케일링)

  • 강대관;박영준;민홍식
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.3
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    • pp.82-88
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    • 1996
  • A simpel formular is proposed for the analysis of gate delay of CMOS gate in the low V$_{GS}-V_{TH}$ scaling. The effects of magnitude of V$_{GS}-V_{TH}$ on gate delay can be readily found through the formula so that it can be used ot design the device parameters in the low V$_{DD}$ CMOS circuits. The measured sresutls confirm the usability of the proposed formula and quantifies the improtance of V$_{TH}$ effects on gate delay under low voltae operation. Applying the formula to the prototype NMOSFET devices representing the five generations of technology, the impacts of the V$_{GS}-V_{TH}$ on the various aspects of the circuit and device characteristics are investigated in a consistent manner.

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The blocking channel to reduce the performance decrease using the low correlation with cyclic delay scheme in LED-ID system (LED-ID 시스템에서 채널 차단에 따른 성능 열화를 줄이기 위한 저 상관 순환 지연 기법)

  • Lee, Kyu-Jin;Kim, Gui-Jung
    • Journal of Digital Convergence
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    • v.13 no.10
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    • pp.319-325
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    • 2015
  • We proposed the blocking channel to reduce the performance decrease using the low correlation with cyclic delay scheme in LED-ID system. LED-ID is based on the visible light to transmit the data. However, It is occurred the block channel by structure or environment of indoor for light of straightness. LED-ID system is degraded the performance by the block channel as loss of data, and burst error. To solve the block channel, the proposed system is overcome the burst error by low correlation among data, which is able to obtain the maximize time diversity gain to improve the performance of BER by cyclic delay scheme. The BER performance is evaluated by computer simulation according to channel parameter. The simulation results shows that proposed system gives much better performance than conventional system and constant cyclic delay scheme system.

The investigation on the Ignition Delay of n-heptane/n-butanol Blend Fuel Using a Rapid Compression Machine at Low Temperature Combustion Regime (저온연소조건에서 급속압축기를 이용한 n-heptane/n-butanol 혼합연료의 착화지연에 관한 연구)

  • Song, Jae Hyeok;Kang, Ki Joong;Yang, Zheng;Lu, XingCai;Choi, Gyung Min;Kim, Duck Jool
    • Journal of the Korean Society of Combustion
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    • v.18 no.2
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    • pp.32-41
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    • 2013
  • This study presents both experimental and numerical investigation of ignition delay time of n-heptane and n-butanol binary fuel. The $O_2$ concentration in the mixture was set to 9-10% to make high exhaust gas recirculation( EGR) rate condition which leads low NOx and soot emission. Experiments were performed using a rapid compression machine(RCM) at compressed pressure 20bar, several compressed temperature and three equivalence ratios(0.4, 1.0, 1.5). In addition, a numerical study on the ignition delay time was performed using CHEMKIN codes to validate experimental results and predict chemical species in the combustion process. The results showed that the ignition delay time increased with increasing the n-butanol fraction due to a decrease of oxidation of n-heptane at the low temperature. Moreover, all of the binary fuel mixtures showed the combustion characteristics of n-heptane such as cool flame mode at low temperature and negative-temperature-coefficient(NTC) behavior. Due to the effect of high EGR rate condition, the operating region is reduced at lean condition and the ignition delay time sharply increased compared with no EGR condition.

Chroma Interpolation using FIR Filter and Linear Filter (FIR필터와 선형필터를 이용한 색차 보간법)

  • Kim, Jeong-Pil;Lee, Yung-Lyul
    • Journal of Broadcast Engineering
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    • v.16 no.4
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    • pp.624-634
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    • 2011
  • Recently, the JCT-VC is developing the next generation video coding standard that is called HEVC. HEVC has adopted many coding technologies increasing coding efficiency. For chroma interpolation, DCT-based interpolation filter showing better performance than the linear filter in H.264/AVC was adopted in HEVC. In this paper, a combined filter that utilizes the FIR filter and the linear filter in H.264/AVC is proposed to increase coding efficiency. When the proposed method is compared with DCT-based interpolation filter, the experimental results for various sequences show that the average BD-rate improvements on chroma U and V components are 0.9% and 1.1%, respectively, in the high efficiency case of random access structure, those on U and V components are 1.1% and 1.1%, respectively, in the low complexity case of random access structure, those on U and V components are 0.9% and 1.4%, respectively, in the high efficiency case of low delay structure, and those on U and V components are 1.8% and 1.8%, respectively, in the low complexity case of low delay structure.

Effect of Active Nutrient Uptake on Heading Under Low Temperature in Rice

  • Hwang, Woon-Ha;Kang, Jea Ran;Baek, Jung-Sun;An, Sung-Hyun;Jeong, Jae-Heok;Jeong, Han-Yong;Lee, Hyen-Seok;Yun, Jong-Tak;Lee, Gun-Hwi;Choi, Kyung-Jin
    • KOREAN JOURNAL OF CROP SCIENCE
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    • v.61 no.3
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    • pp.163-170
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    • 2016
  • Heading time is important element for yield and quality in crops. Among day length and temperature which influence on heading, temperature effect has not been investigated well. To investigate temperature effect on heading, heading date and plant growth characters were checked under the low and high temperature conditions in short day length. Analyzing heading date of six Korean varieties under the high and low temperature condition, heading date of varieties were delayed under low temperature. In the low temperature condition, dry weight and area of leaf were reduced. Varieties showing more delay of heading under low temperature also showed more reduction in leaf area. After selecting three varieties showing significant difference in leaf growth and heading date under different temperature conditions, nutrient contents of plant were analyzed. Nitrogen content was reduced in leaf and shoot under the low temperature condition. OsNRT2.3, nitrate transporter, was significantly down regulated in varieties showing more heading delay. Available phosphate content was decreased in leaf, but increased in shoot due to reduction of phosphate mobility. OsPT1, phosphate transporter regulating phosphate uptake, was more down regulated in varieties showing more heading delay. OsPT6, phosphate transporter regulating phosphate transport in plant, was also significantly down regulated in those varieties. With these data, we expected that active nitrogen and available phosphate uptake and transport in plant would increase leaf growth then might reduce heading delay under the low temperature condition.

Pull-in Characteristics of Delay Switching Phase-Locked Loop (Delay Switching PLL의 Pull-in 특성)

  • 장병화;김재균
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.15 no.5
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    • pp.13-18
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    • 1978
  • A delay switching PLL (DSPLL) is proposed for improvement of the frequency acquisition Performance (pull-in range) while keeping a narrow bandwidth LPF. It has, between the phase detector and the LPF, just a simple RC delay circuit, a switch and another phase detector controlling the switching time. For the common second order PLL, the pull-in capability of the DSPLL is analyzed approximately, without considering additive white noise effect, and verified experimentally. It is shown that the delay switching extends the pull-in range significantly, as much as a half of lock-range. At the phase tracking mode, the delay switching does not function, to make the DSPLL be a normal PLL.

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