• Journal of Korean Institute of Industrial Engineers
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• v.37 no.3
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• pp.264-270
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• 2011

A new method for creating a logical data model is proposed. The logical data model developed by the method defines table, primary key, foreign key, and fields. The framework of the logical data model is constructed by modeling the relationships between events and their related entity types. The proposed method consists of a series of objective and quantitative decisions such as maximum cardinality of relationships and functional dependency between the primary key and attributes. Even beginners to database design can use the methology as long as they understand such basic concepts about relational databases as primary key, foreign key, relationship cardinality, parent-child relationship, and functional dependency. The simple and systematic approach minimizes decision errors made by a database designer. In practial database design the method creates a logical data model in Boyce-Codd normal form unless the user of the method makes a critical decision error, which is very unlikely.

• Korean Journal of Computational Design and Engineering
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• v.14 no.4
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• pp.225-233
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• 2009

The objective of this paper is to examine a construction method and verify PLC logic using the logical modeling and simulation of a virtual plant has complex manufacturing system and the domain of application is car body assembly line of automotive industrial operated by PLC Program. The proposed virtual plant model for the analysis of the construction method consists of three types of components which are virtual device, intermediary transfer and controller is modeled by logical model but it the case of the verification of PLC program, HMI and PLC logic in the field substitute for the controller. The implementation of the proposed virtual plant model is conducted PLC Studio which is an object-oriented modeling language based on logical model. As a result, proposed methods enable 3D graphics is designed in the analysis step to use for verification of PLC program without special efforts.

• Journal of Korea Multimedia Society
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• v.7 no.10
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• pp.1354-1369
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• 2004

This paper presents a logical structure analysis method which transforms Web documents into XML ones. The proposed method consists of three phases: visual grouping, element identification, and logical grouping. To produce a logical structure more accurately, the proposed method defines a document model that is able to describe logical structure information of topic-specific document class. Since the proposed method is based on a visual structure from the visual grouping phase as well as a document model that describes logical structure information of a document type, it supports sophisticated structure analysis. Experimental results with HTML documents from the Web show that the method has performed logical structure analysis successfully compared with previous works. Particularly, the method generates XML documents as the result of structure analysis, so that it enhances the reusability of documents.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.16 no.6
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• pp.305-310
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• 2016

In these days, XML is a de facto standard language for representing and exchanging data. In order to define the conceptual model of the XML, we need to define the representation rules expressed in the diagram and propose the transformation algorithm that converts the diagram into a logical model of XML. This paper proposes a transformation methodology for generating a logical model from the conceptual model of the XML. We use CMXML as a conceptual model and generate XML schema definition as a logical model. For this, we define transformation rules and data structures for XML schema, and propose a transformation algorithm.

• The KIPS Transactions:PartA
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• v.17A no.1
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• pp.27-32
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• 2010

Logical Effort is a simple hand-calculated method that measures quick delay estimation. It has the advantage of reducing the design cycle time. However, it has shortcomings in designing a path for minimum area or power under a fixed-delay constraint. In this paper, we propose an equal delay model and, based on this, a method of optimizing power-delay efficiency in a logical path. We simulate three designs of an eight-input AND gate using our technique. Our results show about 40% greater efficiency in power dissipation than those of Logical Effort method.

• Journal of Engineering Education Research
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• v.16 no.6
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• pp.3-10
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• 2013

The purpose of this study is to design the instructional model to develop logical thinking competency of engineering students and to investigate the effect of the model. The instructional model is composed of the virtual context (films were provided), problem solving, feedback, another problem solving with different perspectives, feedback. The process is looped. The results showed statistically significant improvements between pre- and post-test. The first standardized test of critical thinking showed the improvement from pre-test to post-test (d=0.646). The second test of logical thinking showed the improvement from pre-test to mid-term test (d=0.753) and improvement from mid-term to post-test (d=1.529).

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2000.11a
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• pp.233-238
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• 2000

CNC machine tool is assembled by central processor, PLC(Programmable Logic Controller), and actuator. The sequential control of machine generally controlled by a PLC. The main fault occured at PLC in 3 control parts. In LC faults, operational fault is charged over 70%. This paper describes diagnosis model and data processing for remote monitoring and diagnosis system in machine tools with open architecture controller. Two diagnostic models based on the ladder diagram. Logical Diagnosis Model(LDM), Sequential Diagnosis Model(SDM), are proposed. Data processing structure is proposed ST(Structured Text) based on IEC1131-3. The faults from CNC are received message form open architecture controller and faults from PLC are gathered by sequential data.. To do this, CNC and PLC's logical and sequential data is constructed database.

• KIPS Transactions on Computer and Communication Systems
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• v.2 no.3
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• pp.103-110
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• 2013

Logical Effort [1, 2] is a simple hand-calculated method that measures quick delay estimation. It has the advantage of reducing the design cycle time. However, it has shortcomings in designing a path for minimum area or power under a fixed-delay constraint. The method of overcoming the shortcomings is shown in [3], but it is constrained for a single logical path. This paper presents an advanced gate sizing method in multiple logical paths based on the equal delay model. According to the results of the simulation, the power dissipation for both the existing logical effort method and proposed method is almost equal. However, compared with the existing logical effort method, it is about 52 (%) more efficient in space.

• Korean Journal of Logic
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• v.19 no.1
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• pp.1-49
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• 2016

In the Tractatus, 'logical space' raises the several puzzles as follows. What are logical space, logical coordinates and logical place? What is the point of such analogies and what do they refer to exactly in the Tractatus? And what do occupy logical space? Can facts, proposition, propositional sign, situation and contradiction occupy it respectively? Or is it impossible to reconcile the remarks concerning logical place in the Tractatus? Futhermore, why did Wittgenstein need the concept of logical space? What is the problem that he tried to solve through this concept? In this paper, I will endeavor to answer to these problems. Logical space in the Tractatus is the system of propositions with senses. And it is the concept which Wittgenstein contrived by making model of Hertz's configuration space. Wittgenstein's fundamental coordinates are in some ways similar to geometrical ones. On the other hand logical coordinates are completely different from geometrical ones. Hence attempts to understand logical space by a kind of geometrical spaces cannot be right at all.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.9 no.5
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• pp.109-114
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• 2009

At the present time, buildings are designed higher and more complex than ever before. Therefore the potential disasters are happened such as fire, power outage, earthquake, flood, hurricanes. Their disasters require people inside buildings to be evacuated as soon as possible. This paper presents a new disaster evacuation guidance concept of inner buildings, whiche aims at integrated the constructing of a sensor network and a guidance light networks in order to provide a quick detection of disasters and accurate evacuation guidance based on indoor geo-information, and sends these instructions to people. In this paper, we present the integrated logical model based on sensor and guidance light networks for the fire disaster management in inner building using our concept. And we verify proposed logical model according to experiments with visualization and operations on map.