• Title/Summary/Keyword: Logic size

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A Minimization Technique for BDD based on Microcanonical Optimization (Microcanonical Optimization을 이용한 BDD의 최소화 기법)

  • Lee, Min-Na;Jo, Sang-Yeong
    • The KIPS Transactions:PartA
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    • v.8A no.1
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    • pp.48-55
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    • 2001
  • Using BDD, we can represent Boolean functions uniquely and compactly, Hence, BDD have become widely used for CAD applications, such as logic synthesis, formal verification, and etc. The size of the BDD representation for a function is very sensitive to the choice of orderings on the input variables. Therefore, it is very important to find a good variable ordering which minimize the size of the BDD. Since finding an optimal ordering is NP-complete, several heuristic algorithms have been proposed to find good variable orderings. In this paper, we propose a variable ordering algorithm based on the $\mu$O(microcanonical optimization). $\mu$O consists of two distinct procedures that are alternately applied : Initialization and Sampling. The initialization phase is to executes a fast local search, the sampling phase leaves the local optimum obtained in the previous initialization while remaining close to that area of search space. The proposed algorithm has been experimented on well known benchmark circuits and shows superior performance compared to a algorithm based on simulated annealing.

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Iris Recognition Based on a Shift-Invariant Wavelet Transform

  • Cho, Seongwon;Kim, Jaemin
    • International Journal of Fuzzy Logic and Intelligent Systems
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    • v.4 no.3
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    • pp.322-326
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    • 2004
  • This paper describes a new iris recognition method based on a shift-invariant wavelet sub-images. For the feature representation, we first preprocess an iris image for the compensation of the variation of the iris and for the easy implementation of the wavelet transform. Then, we decompose the preprocessed iris image into multiple subband images using a shift-invariant wavelet transform. For feature representation, we select a set of subband images, which have rich information for the classification of various iris patterns and robust to noises. In order to reduce the size of the feature vector, we quantize. each pixel of subband images using the Lloyd-Max quantization method Each feature element is represented by one of quantization levels, and a set of these feature element is the feature vector. When the quantization is very coarse, the quantized level does not have much information about the image pixel value. Therefore, we define a new similarity measure based on mutual information between two features. With this similarity measure, the size of the feature vector can be reduced without much degradation of performance. Experimentally, we show that the proposed method produced superb performance in iris recognition.

Design and Fabrication of a Ballast Water Treatment System Using UV Lamps (자외선램프를 이용한 선박평형수 처리시스템의 설계 및 제작)

  • Pyo, Tae-Sung;Cheon, Sang-Gyu;Park, Dae-Won;Choi, Sung-Kuk;Kim, Seong-Yeon;Kil, Gyung-Suk
    • Journal of Advanced Marine Engineering and Technology
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    • v.33 no.6
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    • pp.952-958
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    • 2009
  • The International Maritime Organization (IMO) has adopted the ballast water management convention at a diplomatic conference in early 2004 that all ships should be equipped with a treatment system from 2010 gradually. In this paper, the disinfection characteristic of ultra-violet (UV) rays was studied and a ballast water treatment system (BWTS) which can treat $50m^3$/h sea water was manufactured. The system consists of a disinfection chamber with six 3.5 kW UV lamps which are operated by magnetic ballasts, a programmable logic controller (PLC) and set of pipe lines. The biological disinfection efficacy of the prototype BWTS was evaluated following the IMO rules using zooplankton such as Artemia and Rotifer species for the size over $50{\mu}m$, and phytoplankton such as Tetraselmis and Thalassiosira species for the size between 10 to $50{\mu}m$. From the experimental results, the disinfection efficacy was 99.99 % that meets the IMO requirement. However, more studies on an energy saving system are needed because the consumption power of the prototype system is as high as over 21 kWh for $50m^3$/h.

A Sensorless MPPT Control Using an Adaptive Neuro-Fuzzy Logic for PV Battery Chargers (태양광 배터리 충전기를 위한 적응형 신경회로망-퍼지로직 기반의 센서리스 MPPT 제어)

  • Kim, Jung-Hyun;Kim, Gwang-Seob;Lee, Kyo-Beum
    • The Transactions of the Korean Institute of Power Electronics
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    • v.18 no.4
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    • pp.349-358
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    • 2013
  • In this paper, the sensorless MPPT algorithm is proposed where the performance of varied duty ratio change has been improved using multi-layer neuro-fuzzy that aligns with neuro-fuzzy based optimized membership function. Since the change of duty ratio of sensorless MPPT is varied by using the neuro-fuzzy, the MPPT response speed is faster than the convectional method and is able to reduce the steady-state ripple. The neuro fuzzy controller has the response characteristics which is superior to the existing fuzzy controller, because of the usage of the optimal width of the fuzzy membership function. The effectiveness of the proposed method has been verified by simulations and experimental results.

High System Performance with Plasmonic Waveguides and Functional Devices

  • Kwong, Wing-Ying
    • ETRI Journal
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    • v.32 no.2
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    • pp.319-326
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    • 2010
  • Photonics offers a solution to data communication between logic devices in computing systems; however, the integration of photonic components into electronic chips is rather limited due to their size incompatibility. Dimensions of photonic components are therefore being forced to be scaled down dramatically to achieve a much higher system performance. To integrate these nano-photonic components, surface plasmon-polaritons and/or energy transfer mechanisms are used to form plasmonic chips. In this paper, the operating principle of plasmonic waveguide devices is reviewed within the mid-infrared spectral region at the 2 ${\mu}m$ to 5 ${\mu}m$ range, including lossless signal propagation by introducing gain. Experimental results demonstrate that these plasmonic devices, of sizes approximately half of the operating free-space wavelengths, require less gain to achieve lossless propagation. Through optimization of device performance by means of methods such as the use of new plasmonic waveguide materials that exhibit a much lower minimal loss value, these plasmonic devices can significantly impact electronic systems used in data communications, signal processing, and sensors industries.

Design of Asynchronous Library and Implementation of Interface for Heterogeneous System

  • Jung, Hwi-Sung;Lee, Joon-Il;Lee, Moon-Key
    • Proceedings of the IEEK Conference
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    • 2000.06b
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    • pp.221-225
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    • 2000
  • We designed asynchronous event logic library with 0.25$\mu\textrm{m}$ CMOS technology and interface chip for heterogeneous system with high-speed asynchronous FIFO operating at 1.6㎓. Optimized asynchronous standard cell layouts and Verilog models are designed for top-down design methodology. A method for mitigating a design bottleneck when it comes to tolerate clock skew is described. This communication scheme using clock control circuits, which is used for the free of synchronization failures, is analyzed and implemented. With clock control circuit and FIFO, high-speed communication between synchronous modules operating at different clock frequencies or with asynchronous modules is performed. The core size of implemented high-speed 32bit-interface chip for heterogeneous system is about 1.1mm ${\times}$ 1.1mm.

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Variable Step Size Maximum Power Point Tracking Control based on Fuzzy Logic for a Small Wind Power System (소형풍력발전시스템을 위한 퍼지로직 기반의 듀티비 변화량 가변 MPPT 제어)

  • Choi, Dae-Keun;Lee, Kyo-Beum
    • Proceedings of the KIPE Conference
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    • 2011.11a
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    • pp.263-264
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    • 2011
  • 본 논문은 풍력발전시스템의 MPPT 제어 시 정상상태에서의 안정성 향상을 위하여 퍼지로직 기반의 듀티비 변화량 가변 MPPT 방법을 제안한다. 일정한 듀티비 변화량으로 MPPT 제어 시 추종시간이 느려지거나 최대출력 점에서 진동하는 단점이 있다. 출력 전류량에 따라 구성된 퍼지로직 기반으로 듀티비 변화량을 가변 하여 MPPT 제어 시 정상상태 특성과 시스템 응답특성을 향상 시킬 수 있다. 3kW급 계통연계형 풍력발전시스템을 기반으로 수행된 시뮬레이션 결과를 바탕으로 제안한 알고리즘의 타당성을 검증하였다.

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Design of LTPS TFT Level Shifter for System-On-Panel Application (System-On-Panel 적용을 위한 저온 폴리 실리콘 박막 트랜지스터 레벨쉬프터 설계)

  • Lee, Joon-Chang;Jeong, Ju-Young
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.43 no.2 s.344
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    • pp.76-83
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    • 2006
  • We proposed a new level shifter circuit architecture. The prposed circuit can provide high output voltage upto 15V by taking 3.3V logic signal compared to the conventional level shifter. The unposed circuit has compatible speed, low power consumption and chip size. We have confirmed the operation by conducting HSPICE simulation.

Sparse Data Cleaning using Multiple Imputations

  • Jun, Sung-Hae;Lee, Seung-Joo;Oh, Kyung-Whan
    • International Journal of Fuzzy Logic and Intelligent Systems
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    • v.4 no.1
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    • pp.119-124
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    • 2004
  • Real data as web log file tend to be incomplete. But we have to find useful knowledge from these for optimal decision. In web log data, many useful things which are hyperlink information and web usages of connected users may be found. The size of web data is too huge to use for effective knowledge discovery. To make matters worse, they are very sparse. We overcome this sparse problem using Markov Chain Monte Carlo method as multiple imputations. This missing value imputation changes spare web data to complete. Our study may be a useful tool for discovering knowledge from data set with sparseness. The more sparseness of data in increased, the better performance of MCMC imputation is good. We verified our work by experiments using UCI machine learning repository data.

Implementation of RFID Baseband system for Sensor Network (센서네트워크용 RFID Baseband 시스템 구현)

  • Lee, Doo Sung;Kim, Sun Hyung
    • Journal of Korea Society of Digital Industry and Information Management
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    • v.4 no.4
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    • pp.9-19
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    • 2008
  • In this paper, it is studied anti-collision algorithm based on the transmission protocol for RFID baseband system of the lSO/IEC 18000-6 Type-C regulation and designed the baseband part of RFID reader system using FPGA. To compensate this weak point of the slot random aloha algorithm which must have a long time to be dumped before deciding an appropriate slot size according to the number of surrounding tag, we suggested how to apply Bit By Bit algorithm to be able to recognize the tag when the tag is clashing. The design of the baseband part in the RFID reader system is accomplish by use of the ISE9.1i and I made an experiment on it targeting Spartan2. Construction verification is measured each block through Logic Analyzer and I can verify it has no error. I also compared and analyzed the performance between proposed algorithm and past algorithm and verified the improvement of performance.