• Journal of Electrical Engineering and Technology
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• v.6 no.6
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• pp.731-741
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• 2011

Conventional methodologies (empirical, analytical, numerical, hybrid, etc.) for sizing photovoltaic (PV) systems cannot be used when the relevant meteorological data are not available. To overcome this situation, modern methods based on artificial intelligence techniques have been developed for sizing the PV systems. In the present study, the optimum PV/inverter sizing ratio for grid-connected PV systems with orientation due south and inclination angles of $45^{\circ}$ and $60^{\circ}$ in selected Algerian locations was determined in terms of total system output using type-2 fuzzy logic. Because measured data for the locations chosen were not available, a year of synthetic hourly meteorological data for each location generated by the PVSYST software was used in the simulation.

• Journal of the Korean Institute of Telematics and Electronics
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• v.14 no.5
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• pp.1-6
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• 1977

When the input of synchronizer which is used for the purpose of synchronizing the master clock of computer with the interrupt system, a sort of random variable device, is gated with asynchronous intersection of the fall time of the master clock and the risetime oi the interrupt request, synchronizer is drived in Metastable region. This paper is presented circuit analysis of Metastable phenomena and analysis for transient process from metastable point to stable state, and also realities the collect logic with Inverter and open collector methods with a view to improving logic failure caused by the mishappen phenomena.

• Journal of Semiconductor Engineering
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• v.3 no.2
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• pp.161-167
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• 2022

Electrical characteristics of LDMOS power device with LDD(Lightly Doped Drain) structure is studied with variation of the region of channel and LDD. The channel in LDMOSFET encloses a junction-type source and is believed to be an important parameter for determining the circuit operation of CMOS inverter. Two-dimensional TCAD MEDICI simulation is used to study hot-carrier effect, on-resistance Ron, breakdown voltage, and transient switching characteristic. The voltage-transfer characteristics and on-off switching properties are studied as a function of the channel length and doping levels. The digital logic levels of the output and input voltages are analyzed from the transfer curves and circuit operation. Study indicates that drain current significantly depends on the channel length rather than the LDD region, while the switching transient time is almost independent of the channel length. The high and low logic levels of the input voltage showed a strong dependency on the channel length, while the lateral substrate resistance from a latch-up path in the CMOS inverter was comparable to that of a typical CMOS inverter with a guard ring.

• Journal of IKEEE
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• v.8 no.1 s.14
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• pp.47-53
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• 2004

We present the design of ternary flip-flop which is based on ternary logic so as to process ternary data. These flip-flops are composed with ternary voltage mode NMAX, NMIN, INVERTER gates. These logic gate circuits are designed using CMOS and obtained the characteristics of a lower voltage, lower power consumption as compared to other gates. These circuits have been simulated with the electrical parameters of a standard 0.35um CMOS technology and 3.3Volts supply voltage. The architecture of proposed ternary flip-flop is highly modular and well suited for VLSI implementation, only using ternary gates.

• Journal of Power Electronics
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• v.16 no.3
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• pp.1097-1109
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• 2016

Fault detection and isolation are related to system monitoring, identifying when a fault has occurred, and determining the type of fault and its location. Fault detection is utilized to determine whether a problem has occurred within a certain channel or area of operation. Fault detection and diagnosis have become increasingly important for many technical processes in the development of safe and efficient advanced systems for supervision. This paper presents an integrated technique for fault diagnosis and classification for open- and short-circuit faults in three-phase inverter circuits. Discrete wavelet transform and principal component analysis are utilized to detect the discontinuity in currents caused by a fault. The features of fault diagnosis are then extracted. A fault dictionary is used to acquire details about transistor faults and the corresponding fault identification. Fault classification is performed with a fuzzy logic system and relevance vector machine (RVM). The proposed model is incorporated with a set of optimization techniques, namely, evolutionary particle swarm optimization (EPSO) and cuckoo search optimization (CSO), to improve fault detection. The combination of optimization techniques with classification techniques is analyzed. Experimental results confirm that the combination of CSO with RVM yields better results than the combinations of CSO with fuzzy logic system, EPSO with RVM, and EPSO with fuzzy logic system.

• Journal of IKEEE
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• v.24 no.1
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• pp.364-367
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• 2020

This paper presents the off-grid PV-ESS system of sequential voltage control method applied to OR logic gate. The conventional off-grid PV-ESS system with the low-voltage series connection has problems due to capacity expansion. To solve these problems, this paper proposes a noble PV-ESS system with high efficiency and low cost by applying sequential voltage control technique of the high-voltage series connection of analog circuit type. The input voltage of DC to AC inverter can be converted from the low-voltage by the combinations of series connection of the conventional cascaded 24V solar cell unit modules to the high-voltage of 384V in battery. The output voltage of the battery was 384V as the each input voltage of three phase DC to AC inverter, and the each output voltage of three phase 10kW DC to AC inverter is designed to be AC380V@60Hz as the line to line rms voltage value. To prove the validity of the theoretical analysis by PSIM simulation, the operating characteristics of sequential voltage control system with OR logic gate were confirmed through experiment results.

• Journal of the Korean Institute of Telematics and Electronics
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• v.24 no.4
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• pp.701-707
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• 1987

This paper is concerned with an accurate delay time modling of the ED MOS logic gates and its application to the multiple delay logic simulator. The proposed delay model of the ED MOS logic gate takes account of the effects of not only the loading conditions but also the slope of the input waveform. Defining delay as the time spent by the current imbalance of the active inverter to charge and discharge the output load, with respect to physical reference levels, rise and fall model delay times are obtained in an explicit formulation, using optimally weighted imbalance currents at the end points of the voltage transition. A logic simulator which uses multiple rise/fall delays based on the model as decribed in the above has been developed. The new delay model and timing verification method are evaluated with repect to delay accuracy and execution time.

• Journal of Electrical Engineering and Technology
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• v.10 no.1
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• pp.379-387
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• 2015

A custom power device provides an integrated solution to the present problems that are faced by the utilities and power distribution. In this paper, a new controller is designed which is connected to a multiconverter unified power quality conditioner (MC-UPQC) for improving the power quality issues adopted modified synchronous reference frame (MSRF) theory with Fuzzy logic control (FLC) technique. This newly designed controller is connected to a source in order to compensate voltage and current in two feeders. The expanded concept of UPQC is multi converter-UPQC; this system has a two-series voltage source inverter and one shunt voltage source inverter connected back to back. This configuration will helps mitigate any type of voltage / current fluctuations and power factor correction in power distribution network to improve power quality issues. In the proposed system the power can be conveyed from one feeder to another in order to mitigate the voltage sag, swell, interruption and transient response of the system. The control strategies of multi converter- UPQC are designed based on the modified synchronous reference frame theory with fuzzy logic controller. The fast dynamics response of dc link capacitor is achieved with the help of Fuzzy logic controller. Different types of fault conditions are taken and simulated for the analysis and the results are compared with the conventional method. The relevant simulation and compensation performance analysis of the proposed multi converter-UPQC with fuzzy logic controller is performed.

• Journal of Power Electronics
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• v.17 no.1
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• pp.115-126
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• 2017

This paper presents a new cascaded asymmetrical single phase multilevel converter with a reduced number of isolated DC sources and power semiconductor switches. The proposed inverter has only two H-bridges connected in cascade, one switching at a high frequency and the other switching at a low frequency. The Low Switching Frequency Inverter (LSFI) generates seven levels whereas the High Switching Frequency Inverter (HSFI) generates only two levels. This paper also presents a solution to the capacitor balancing issues of the LSFI. The proposed inverter has lot of advantages such as reductions in the number of DC sources, switching losses, power electronic devices, size and cost. The proposed inverter with a capacitor voltage balancing algorithm is simulated using MATLAB/SIMULINK. The switching logic of the proposed inverter with a capacitor voltage balancing algorithm is developed using a FPGA SPATRAN 3A DSP board. A laboratory prototype is built to validate the simulation results.

• Journal of Power Electronics
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• v.15 no.5
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• pp.1329-1337
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• 2015

By placing distributed generation power sources beside a big nonlinear load, these sources can be used as a power quality enhancer, while injecting some active power to the network. In this paper, a new scheme to use the distributed generation power source in both operation modes is presented. In this scheme, a fuzzy controller is added to adjust the optimal set point of inverter between compensating mode and maximum active power injection mode, which works based on the harmonic content of the nonlinear load. As the high order current harmonics can be easily rejected using passive filters, the DG is used to compensate the low order harmonics of the load current. Multilevel transformerless cascade inverters are preferred in such utilization, as they have more flexibility in current/voltage waveform. The proposed scheme is simulated in MATLAB/SIMULINK to evaluate the circuit performance. Then, a 1kw single phase prototype of the circuit is used for experimental evaluation of the paper. Both simulative and experimental results prove that such a circuit can inject a well-controlled current with desired harmonics and THD, while having a smaller switching frequency and better efficiency, related to previous 3-phase inverter schemes in the literature.