• The Journal of Korean Institute of Communications and Information Sciences
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• v.39B no.7
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• pp.479-490
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• 2014

A lower extremity exoskeleton is a robot device that attaches to the lower limbs of the human body to augment or assist with the walking ability of the wearer. In order to improve the wearer's walking ability, the robot senses the wearer's walking locomotion and classifies it into a gait-phase state, after which it drives the appropriate robot motions for each state using its actuators. This paper presents a method by which the robot senses the wearer's locomotion along with a novel classification algorithm which classifies the sensed data as a gait-phase state. The robot determines its control mode using this gait-phase information. If erroneous information is delivered, the robot will fail to improve the walking ability or will bring some discomfort to the wearer. Therefore, it is necessary for the algorithm constantly to classify the correct gait-phase information. However, our device for sensing a human's locomotion has very sensitive characteristics sufficient for it to detect small movements. With only simple logic like a threshold-based classification, it is difficult to deliver the correct information continually. In order to overcome this and provide correct information in a timely manner, a probabilistic gait-phase classification algorithm is proposed. Experimental results demonstrate that the proposed algorithm offers excellent accuracy.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.6
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• pp.80-88
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• 2008

In this paper, the block cipher algorithms, 3-DES(Triple Data Encryption Standard), AES(Advanced Encryption Standard), SEED, HASH(SHA-1), which are domestic and international standards, have been implemented as an integrated cryptographic engine for smart card applications. For small area and low power design which are essential requirements for portable devices, arithmetic resources are shared for iteration steps in each algorithm, and a two-level clock gating technique was used to reduce the dynamic power consumption. The integrated cryptographic engine was verified with ALTERA Excalbur EPXA10F1020C device, requiring 7,729 LEs(Logic Elements) and 512 Bytes ROM, and its maximum clock speed was 24.83 MHz. When designed by using Samsung 0.18 um STD130 standard cell library, the engine consisted of 44,452 gates and had up to 50 MHz operation clock speed. It was estimated to consume 2.96 mW, 3.03 mW, 2.63 mW, 7.06 mW power at 3-DES, AES, SEED, SHA-1 modes respectively when operating at 25 MHz clock. We found that it has better area-power optimized structure than other existing designs for smart cards and various embedded security systems.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.7
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• pp.61-68
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• 2008

In this paper, we propose an efficient hardware architecture and algorithm to increase an encoding process rate and implement a hardware for CABAC (Context Adaptive Binary Arithmetic Coding) which is used with one of the entropy coding ways for the latest video compression technique, H.264/AVC (Advanced Video Coding). CABAC typically provides a better high compression performance maximum 15% compared with CAVLC. However, the complexity of operation of CABAC is significantly higher than the CAVLC. Because of complicated data dependency during the encoding process, the complexity of operation is higher. Therefore, various architectures were proposed to reduce an amount of operation. However, they have still latency on account of complicated data dependency. The proposed architecture has two techniques to implement efficient pipeline architecture. The one is quick calculation of 7, 8th bits used to calculate a probability is the first step in Binary arithmetic coding. The other is one step reduced pipeline arcbitecture when the type of the encoded symbols is MPS. By adopting these two techniques, the required processing time was reduced about 27-29% compared with previous architectures. It is designed in a hardware description language and total logic gate count is 19K using 0.18um standard cell library.

• Industry Promotion Research
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• v.5 no.1
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• pp.117-124
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• 2020

The purpose of this paper is to find out the origin and significance of Sipgan-Sipiji that Yinyang and five elements are assigned. By looking at the hypotheses that Sipgan-Sipiji may have originated from the ancient Chinese calendar, the contents of the materials recorded in the classical literature, and the records left in the Oracle bone script, we wanted to explore the starting point of Sipgan-Sipiji in Eastern humanities and social sciences that could never be overlooked. Through the literature review of Sipgan-Sipiji, the researcher believes that this code system was completed by Hwangje and his teacher Daeyo, who led paternal clan society in the latter part of the Chinese Neolithic Age, because of supporting the use of the October calendar associated with Sipgan, and because Sipgan in the Oracle bone script seems to keep the sacredness and at the same time to be used to document the time. I believe that this consideration of Sipgan-Sipiji will be helpful for future related research in the process of underlying the research effort of Myeongri Science, such as the security of the logic of the theoretical framework for the theory system and the proof through statistical social science techniques.

• Journal of Radiation Protection and Research
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• v.37 no.1
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• pp.16-24
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• 2012

In the present study, a gamma-ray detector and associated signal processing circuit was developed for a side-absorber of a dual-mode Compton camera. The gamma-ray detector was made by optically coupling a CsI(Tl) scintillation crystal to a silicon photodiode. The developed signal processing circuit consists of two parts, i.e., the slow part for energy measurement and the fast part for timing measurement. In the fast part, there are three components: (1) fast shaper, (2) leading-edge discriminator, and (3) TTL-to-NIM logic converter. AC coupling configuration between the detector and front-end electronics (FEE) was used. Because the noise properties of FEE can significantly affect the overall performance of the detection system, some design criteria were presented. The performance of the developed system was evaluated in terms of energy and timing resolutions. The evaluated energy resolution was 12.0% and 15.6% FWHM for 662 and 511 keV peaks, respectively. The evaluated timing resolution was 59.0 ns. In the conclusion, the methods to improve the performance were discussed because the developed gamma-ray detection system showed the performance that could be applicable but not satisfactory in Compton camera application.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.43 no.9 s.351
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• pp.6-13
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• 2006

In this paper, we studied vehicle to vehicle (VTV) communication system using DSRC of 5.8 GHz bands. Nowadays, in the road traffic system is going intelligent and advancing, communication between driving vehicle is very important technology for ITS. We can contrive smoothness and safety traffic flowing by exchanging information about velocity, location, braking and driving condition of nearby vehicles. Therefore, we developed and verified the system which required for the communication among vehicles using DSRC technology of 5.8 GHz band hasa 1 Mbps data rate in the high mobility condition. For this, we developed DSRC modem, data link layer and logic link layer to make it possible that communication between vehicles of perfectly operation, and developed application service program for VTV communication. We performed to communication test in the general road and ascent road. In case of the general mad, obtained VTV communication results are more than number of 17 with in 300 m LOS coverage, and total communication time are $2.34{\sim]18.7$ msec that considered maximum 8-transaction. We blow that obtained results can be used VTV communication or the in areas form the feasibility road test as a function or various conditions. In the future, this system is very useful of advanced safety vehicle (ASV) and super smart vehicle system (SSVS) and so on.

• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.12
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• pp.85-98
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• 1998

This paper proposes a new design method of neuro-FLC by the Lamarckian co-adaptation scheme that incorporates the backpropagation learning into the GA evolution in an attempt to find optimal design parameters (fuzzy rule base and membership functions) of application-specific FLC. The design parameters are determined by evolution and learning in a way that the evolution performs the global search and makes inter-FLC parameter adjustments in order to obtain both the optimal rule base having high covering value and small number of useful fuzzy rules and the optimal membership functions having small approximation error and good control performance while the learning performs the local search and makes intra-FLC parameter adjustments by interacting each FLC with its environment. The proposed co-adaptive design method produces better approximation ability because it includes the backpropagation learning in every generation of GA evolution, shows better control performance because the used COG defuzzifier computes the crisp value accurately, and requires small workspace because the optimization procedure of fuzzy rule base and membership functions is performed concurrently by an integrated fitness function on the same fuzzy partition. Simulation results show that the Lamarckian co-adapted FLC produces the most superior one among the differently generated FLCs in all aspects such as the number of fuzzy rules, the approximation ability, and the control performance.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.11 s.353
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• pp.26-36
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• 2006

In this paper, we propose a cost-effective color filter may (CFA) demosaicing method for digital still cameras in which a single CCD or CMOS image sensor is used. Since a CFA is adopted, we must interpolate missing color values in the red, green and blue channels at each pixel location. While most state-of-the-art algorithms invest a great deal of computational effort in the enhancement of the reconstructed image to overcome the color artifacts, we focus on eliminating the color artifacts with low computational complexity. Using spatial correlation of the adjacent pixels, the edge-directional information of the neighbor pixels is used for determining the edge direction of the current pixel. We apply our method to the state-of-the-art algorithms which use edge-directed methods to interpolate the missing color channels. The experiment results show that the proposed method enhances the demosaiced image qualify from $0.09{\sim}0.47dB$ in PSNR depending on the basis algorithm by removing most of the color artifacts. The proposed method was implemented and verified successfully using verilog HDL and FPGA. It was synthesized to gate-level circuits using 0.25um CMOS standard cell library. The total logic gate count is 12K, and five line memories are used.

• Asia-Pacific Journal of Business Venturing and Entrepreneurship
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• v.9 no.2
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• pp.23-33
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• 2014

This paper aims at delivering significant implications to high-tech startups by visualizing the implementation process of leading KOSDAQ listed companies's business model. This paper founded two meaningful outcomes; first, hish-tech starts-up make a clear direction of implementing intangible business model in real business, second, targeting the role model of benchmarking business model among leading companies, by linking common feature between high-tech starts-up and leading KOSDAQ listed venutures sharing one of Key performance indexes falls on viable business model. The research results of visualizing the implementation of leading KOSDAQ listed ventures' business model shows three major implications. First, business model indicates not just simple logic of creating and delivering values, but more shows CEO leading management vehicle. Second, business model represents the multi-dimension process itself of integrating in and out company's core assets and competencies initiated by CEO. Third, financial outcomes of business model is automatic result of implementing on setting target customer, creating value, and delivering it rather than planned strategically. Fourth, the focal points of implementing business model falls on collecting real information from business sites.

• Journal of Internet Computing and Services
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• v.19 no.5
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• pp.21-31
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• 2018

Cyber penetration attacks can not only damage cyber space but can attack entire infrastructure such as electricity, gas, water, and nuclear power, which can cause enormous damage to the lives of the people. Also, cyber space has already been defined as the fifth battlefield, and strategic responses are very important. Most of recent cyber attacks are caused by malicious code, and since the number is more than 1.6 million per day, automated analysis technology to cope with a large amount of malicious code is very important. However, it is difficult to deal with malicious code encryption, obfuscation and packing, and the dynamic analysis technique is not limited to the performance requirements of dynamic analysis but also to the virtual There is a limit in coping with environment avoiding technology. In this paper, we propose a machine learning based malicious code analysis technique which improve the weakness of the detection performance of existing analysis technology while maintaining the light and high-speed analysis performance applicable to commercial endpoints. The results of this study show that 99.13% accuracy, 99.26% precision and 99.09% recall analysis performance of 71,000 normal file and malicious code in commercial environment and analysis time in PC environment can be analyzed more than 5 per second, and it can be operated independently in the endpoint environment and it is considered that it works in complementary form in operation in conjunction with existing antivirus technology and static and dynamic analysis technology. It is also expected to be used as a core element of EDR technology and malware variant analysis.