• Journal of IKEEE
• /
• v.27 no.4
• /
• pp.683-686
• /
• 2023

In this paper, we designed a Delayed Dual Core Lock-Step (D-DCLS) processor where two cores operate same instructions with delay and the result is compared to mitigate soft errors and common mode failures in automotive electronic systems. Because D-DCLS does not know which core an error occurred in, each core must be recovered to the point before the error occurred, but complex hardware modifications are required to return all intermediate values on the pipeline stage. In this paper, in order for easy hardware implementation, all register values are saved to a buffer whenever a branch instruction is executed. When an error is detected, the saved register values are automatically restored, and then 'BX LR' instruction is executed to return to the last branch point. The proposed D-DCLS processor was designed using Verilog HDL and was confirmed to continue normal operation after automatically recovering error.

• Journal of IKEEE
• /
• v.26 no.4
• /
• pp.628-632
• /
• 2022

In this paper, a triple-core delayed lock-step processor is proposed for automotive applications. It performs same operations in three different cores independently, and votes their results to get final values. Therefore its operations are safe even if errors occur in one core. Its three cores operate in a delayed manner to prevent simultaneous errors in multiple cores due to radiative ray or electromagnetic wave. When an error occurs in main core connected to the memory, wrong values can be stored in the memory, so the proposed processor performs memory rollback to restore correct values. Simulation results show that the proposed processor successfully compensates various errors.

• 제어로봇시스템학회:학술대회논문집
• /
• 2003.10a
• /
• pp.1836-1840
• /
• 2003

This paper, we propose a new phase-locked loop (PLL) system with the controllable output phase, independent from the output frequency, and lock-up time. This PLL system has a dual control loop is described, the inner loop greatly improved VCO characteristic such as faster speed response as well as higher operation bandwidth, to minimize the effect of the VCO noise and the power supply variation and also get better linearity of VCO output. The main loop is the heart of this PLL which greatly improved the output frequency instability due to the external high frequency noise coupling to the input reference frequency also the main loop can control the output phase, independent from the output frequency, and reduce the lock-up time of the step frequency response. The experimental results confirm the validity of the proposed strategy.

• 한국전산유체공학회:학술대회논문집
• /
• 2008.08a
• /
• pp.53.3-53.3
• /
• 2008

• Wind and Structures
• /
• v.15 no.3
• /
• pp.189-208
• /
• 2012

Lock-in and drag amplification phenomena are studied for a flexible cantilever using a simplified fluid-structure interaction approach. Instead of solving the 3D domain, a simplified setup is devised, in which 2D flow problems are solved on a number of planes parallel to the wind direction and transversal to the structure. On such planes, the incompressible Navier-Stokes equations are solved to estimate the fluid action at different positions of the line-like structure. The fluid flow on each plane is coupled with the structural deformation at the corresponding position, affecting the dynamic behaviour of the system. An Arbitrary Lagrangian-Eulerian (ALE) approach is used to take in account the deformation of the domain, and a fractional-step scheme is used to solve the fluid field. The stabilization of incompressibility and convection is achieved through orthogonal quasi-static subscales, an approach that is believed to provide a first step towards turbulence modelling. In order to model the structural problem, a special one-dimensional element for thin walled cross-section beam is implemented. The standard second-order Bossak method is used for the time integration of the structural problem.

• Journal of the Computational Structural Engineering Institute of Korea
• /
• v.29 no.1
• /
• pp.9-18
• /
• 2016

The slender structures such as high rise building or marine riser are highly susceptible to dynamic force exerted by fluid-structure interactions among which vortex-induced vibration(VIV) is the main cause of dynamic unstability of the structural system. If VIV occurs in natural frequency regime of the structure, fatigue failure likely happens by so-called lock-in phenomenon. This study presents the numerical analysis of dynamic behavior of both structure and fluid in the lock-in regimes and investigates the subjacent phenomena to hold the resonance frequency in spite of the change of flow condition. Unsteady and laminar flow was considered for a two-dimensional circular cylinder which was assumed to move freely in 1 degree of freedom in the direction orthogonal to the uniform inflow. Fluid-structure interaction was implemented by solving both unsteady flow and dynamic motion of the structure sequentially in each time step where the fluid domain was remeshed considering the movement of the body. The results show reasonable agreements with previous studies and reveal characteristic features of the lock-in phenomena. Not only the lift force but also drag force are drastically increasing during the lock-in regime, the vertical displacement of the cylinder reaches up to 20% of the diameter of the cylinder. The correlation analysis between lift and vertical displacement clearly show the dramatic change of the phase difference from in-phase to out-of-phase when the cylinder experiences lock-in. From the results, it can be postulated that the change of phase difference and flow condition is responsible for the resonating behavior of the structure during lock-in.

• The KIPS Transactions:PartA
• /
• v.10A no.3
• /
• pp.247-254
• /
• 2003

This paper describes a Delay Locked Loop (DLL) with low supply voltage and wide lock range for Synchronous DRAM which employs Double Data Rate (DDR) technique for faster data transmission. To obtain high resolution and fast lock-on time, a new type of phase detector is designed. The new counter and lock indicator structure are suggested based on the Dual-clock dual-data Flip Flop (DCDD FF). The DCDD FF reduces the size of counter and lock indicator by about 70%. The delay line is composed of coarse and fine units. By the use of fast phase detector, the coarse delay line can detect minute phase difference of 0.2 nsec and below. Aided further by the new type of 3-step vernier fine delay line, this DLL circuit achieves unprecedented timing resolution of 25psec. This DLL spans wide locking range from 500MHz to 500MHz and generates high-speed clocks with fast lock-on time of less than 5 clocks. When designed using 0.25 um CMOS technology with 1.8V supply voltage, the circuit consumes 32mA at 500MHz locked condition. This circuit can be also used for other applications as well, such as synchronization of high frequency communication systems.

• The KIPS Transactions:PartC
• /
• v.16C no.3
• /
• pp.299-306
• /
• 2009

Followed by the popularity of the Internet, a number of access technologies to the Internet have been developed. EAP is an authentication framework. It is designed to provide the authentication functionality in the access network. Because of its flexibility and extensibility EAP poses a global solution for the authentication supported by many access networks. However, EAP has critical weaknesses in the protocol which may, in turn, decrease the EAP performance. Some of the weaknesses are caused by the "lock-step" flow control which only supports a single packet in flight. Considering the weaknesses, we propose a solution for the flow control. Using simulation we prove that our solutions improve the EAP performance.

• Journal of the Korean Society for Aeronautical & Space Sciences
• /
• v.41 no.1
• /
• pp.1-9
• /
• 2013

In this paper, numerical simulations are performed on the lock-in phenomena of vortex induced vibration(VIV) of a two dimensional cylinder. A deforming grid as well as a rigidly moving grid are used to simulate the movement of the cylinder. The grid deformation is accomplished by the linear spring analogy. Converged solutions, which are obtained by controling the grid size and the non-dimensional time step, are used for comparison and validation of the analysis results. Moreover, the efficiency and the accuracy of the coupling methods for fluid-structure interaction are examined.

• Journal of the Korean Society for Precision Engineering
• /
• v.19 no.10
• /
• pp.130-138
• /
• 2002

This paper presents the modeling and analysis of dynamic characteristics of hydraulic snubber in electric power plant. The nonlinear state-space model of 14th order to describe the dynamics of the snubber was established by Simulink. The simulation results show that the hydraulic snubber reacts as like the conventional shock absorbers against the high pulse shock load. The snubber also shows the peculiar characteristics to the small step load, which temporarily lock the control valves up, however maintain same steady-state pressures of all internal chambers in the long run. Two case studies for the analysis of the snubber were addressed. Practical pulse testing method was also proposed to identify the frequency response characteristics of the snubber.