• Title/Summary/Keyword: Load resistor

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A Power MOSFET Driver with Protection Circuits (보호 회로를 포함한 전력 MOSFET 구동기)

  • Han, Sang-Chan;Lee, Soon-Seop;Kim, Soo-Won;Lee, Duk-Min;Kim, Seong-Dong
    • Journal of the Korean Institute of Telematics and Electronics D
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    • v.36D no.2
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    • pp.71-80
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    • 1999
  • In this paper, a power MOSFET driver with protection circuits is designed using a 2${\mu}m$ high-voltage CMOS process. For stable operations of control circuits a power managing circuit is designed, and a voltage-detecting short-circuit protection(VDSCP) is proposed to protect a voltage regulator in the power control circuit. The proposed VDSCP scheme eliminates voltage drop caused by a series resistor, and turns off output current under short-circuit state. To protect a power MOSFET, a short-load protection, a gate-voltage limiter, and an over-voltage protection circuit are also designed A high voltage 2 ${\mu}m$ technology provides the breakdown voltage of 50 V. The driver consumes the power of 20 ~ 100 mW along its operation state excluding the power of the power MOSFET. The active area of the power MOSFET driver occupies $3.5 {\times}2..8mm^2$.

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A 10b 100MS/s 0.13um CMOS D/A Converter Based on A Segmented Local Matching Technique (세그먼트 부분 정합 기법 기반의 10비트 100MS/s 0.13um CMOS D/A 변환기 설계)

  • Hwang, Tae-Ho;Kim, Cha-Dong;Choi, Hee-Cheol;Lee, Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.4
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    • pp.62-68
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    • 2010
  • This work proposes a 10b 100MS/s DAC based on a segmented local matching technique primarily for small chip area. The proposed DAC employing a segmented current-steering structure shows the required high linearity even with the small number of devices and demonstrates a fast settling behavior at resistive loads. The proposed segmented local matching technique reduces the number of current cells to be matched and the size of MOS transistors while a double-cascode topology of current cells achieves a high output impedance even with minimum sized devices. The prototype DAC implemented in a 0.13um CMOS technology occupies a die area of $0.13mm^2$ and drives a $50{\Omega}$ load resistor with a full-scale single output voltage of $1.0V_{p-p}$ at a 3.3V power supply. The measured DNL and INL are within 0.73LSB and 0.76LSB, respectively. The maximum measured SFDR is 58.6dB at a 100MS/s conversion rate.

Speed Sensorless Vector Control of Wound Induction Motor Using a MRAS Method (MRAS 기법을 이용한 권선형 유도전동기의 속도센서리스 벡터제어)

  • Choi, Hyun-Sik;Lee, Jae-Hak;Um, Tae-Wook
    • Journal of the Institute of Electronics Engineers of Korea TE
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    • v.42 no.1
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    • pp.29-34
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    • 2005
  • The wound induction motor can provide high starting torque and reduced starting current simultaneously by inserting large resistor externally when starting. And this technique is one of the well known methods among the induction motor starting methods and generally used for heavy load starting such as crane and cement factories. The conventional PI controller has been widely used in industrial application due to the simple control algorithm and is generally used for control of current torque, position, and speed for the wound induction motor drive system. However, the conventional control system for wound induction motor may result in poor performance because sensors have to be used but are often limited by the environmental condition. Recently, to overcome these problems, many sensorless vector control methods for the wound induction motor have been studied. This paper presents a MRAS method for sensorless vector control of the wound induction motor drive. In the conventional MRAS method, in low frequency, the stator resistance variation may result in poor performance. Therefore, this paper presents a MRAS method with stator and rotor resistance tuning for sensorless vector control of the wound induction motor to overcome several shortages of the conventional MRAS caused by parameter variation and to enhance the robustness of the sensorless vector control. The validity and effectiveness of the proposed method is verified through digital simulation.