• Title/Summary/Keyword: Load impedance

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Performance Degradation of Dead-end Type PEMFC by Startup and Shutdown Cycles (시동/정지 반복에 의한 데드엔드형 고분자전해질 연료전지의 성능 감소)

  • Jeong, Jaehyeun;Jeong, Jaejin;Song, Myunghyun;Chung, Hoibum;Na, Ilchai;Lee, Ho;Park, Kwonpil
    • Korean Chemical Engineering Research
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    • v.51 no.5
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    • pp.540-544
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    • 2013
  • During start up and shut down of a proton exchange membrane fuel cells (PEMFC), the performance and lifetime of PEMFC were reduced. In this study, effect of startup and shutdown were investigated in dead-end type PEMFC using oxygen as a cathode gas with polarization curve, impedance spectroscopy (EIS), scanning electron microscopy (SEM) and transmission electron microscopy (TEM). Dummy load which eliminates residual hydrogen and oxygen during startup and shutdown operation should be applied to mitigated the degradation of PEMFC performance. At 50% relative humidity (RH) under the repetitive on/off cycling, the cell performance decayed faster than at 100% RH because of corrosion of the cathode carbon support. Water suppling into cell reduced the degradation rate of dead-end type PEMFC during start up and shut down cycling at 50% RH.

Corrosion and Nanomechanical Behaviors of 16.3Cr-0.22N-0.43C-1.73Mo Martensitic Stainless Steel

  • Ghosh, Rahul;Krishna, S. Chenna;Venugopal, A.;Narayanan, P. Ramesh;Jha, Abhay K.;Ramkumar, P.;Venkitakrishnan, P.V.
    • Corrosion Science and Technology
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    • v.15 no.6
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    • pp.281-289
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    • 2016
  • The effect of nitrogen on the electrochemical corrosion and nanomechanical behaviors of martensitic stainless steel was examined using potentiodynamic polarization and nanoindentation test methods. The results indicate that partial replacement of carbon with nitrogen effectively improved the passivation and pitting corrosion resistance of conventional high-carbon and high- chromium martensitic steels. Post-test observation of the samples after a potentiodynamic test revealed a severe pitting attacks in conventional martensitic steel compared with nitrogen- containing martensitic stainless steel. This was shown to be due to (i) microstructural refinement results in retaining a high-chromium content in the matrix, and (ii) the presence of reversed austenite formed during the tempering process. Since nitrogen addition also resulted in the formation of a $Cr_2N$ phase as a process of secondary hardening, the hardness of the nitrogen- containing steel is slightly higher than the conventional martensitic stainless steel under tempered conditions, even though the carbon content is lowered. The added nitrogen also improved the wear resistance of the steel as the critical load (Lc2) is less, along with a lower scratch friction coefficient (SFC) when compared to conventional martensitic stainless steel such as AISI 440C.

Low-Power and High-Efficiency Class-D Audio Amplifier Using Composite Interpolation Filter for Digital Modulators

  • Kang, Minchul;Kim, Hyungchul;Gu, Jehyeon;Lim, Wonseob;Ham, Junghyun;Jung, Hearyun;Yang, Youngoo
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.1
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    • pp.109-116
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    • 2014
  • This paper presents a high-efficiency digital class-D audio amplifier using a composite interpolation filter for portable audio devices. The proposed audio amplifier is composed of an interpolation filter, a delta-sigma modulator, and a class-D output stage. To reduce power consumption, the designed interpolation filter has an optimized composite structure that uses a direct-form symmetric and Lagrange FIR filters. Compared to the filters with homogeneous structures, the hardware cost and complexity are reduced by about half by the optimization. The coefficients of the digital delta-sigma modulator are also optimized for low power consumption. The class-D output stage has gate driver circuits to reduce shoot-through current. The implemented class-D audio amplifier exhibited a high efficiency of 87.8 % with an output power of 57 mW at a load impedance of $16{\Omega}$ and a power supply voltage of 1.8 V. An outstanding signal-to-noise ratio of 90 dB and a total harmonic distortion plus noise of 0.03 % are achieved for a single-tone input signal with a frequency of 1 kHz.

A $2.1{\sim}2.5\;GHz$ variable gain LNA with a shunt feed-back (병렬 피드백을 사용하여 $2.1{\sim}2.5\;GHz$ 대역에서 이득 제어가 가능한 저잡음 증폭기의 설계)

  • Hwang, Yong-Seok;Yoo, Hyung-Joun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.44 no.7 s.361
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    • pp.54-61
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    • 2007
  • A variable gain low noise amplifier (VG-LNA) implemented in TSMC 0.18 um process is presented. This VG-LNA is designed of two stage amplifier, and its gain is controlled by the shunt feedback loop composed of a gain control transistor (GCT) and a coupling capacitor in second stage. The channel resistance of GCT in the shunt feedback loop influences the input and output stages of a second stage by the Miller effect. Total gain of the proposed VG-LNA is changed by two factors, the load impedance reduction and the interstage mismatch by controlling the channel resistance of the GCT. Consequently, by adding a shunt feedback with a gain control transistor, this proposed VG-LNA achieves both wide gain tuning range of 37 dB and continuous gain control simultaneously.

Size Reduction of a Quasi Class-E High Power Amplifier Using Defected Ground Structure (결함 접지 구조를 이용한 유사 E급 전력 증폭기의 소형화)

  • Choi, Heung-Jae;Jeong, Yong-Chae;Lim, Jong-Sik;Jung, Young-Bae;Eom, Soon-Young;Kim, Chul-Dong
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.21 no.1
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    • pp.61-68
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    • 2010
  • In this work, a reduced size 20W quasi class-E Power Amplifier(PA) with defected ground structure load-network is presented for WCDMA base station application. Harmonic impedances required for the class E operation are satisfied by applying the dumbbell and the asymmetric spiral DGS. Open impedance for 2nd harmonic frequency which has the highest power and nearly short impedances for other higher order harmonics are provided by the proposed DGS load-network. The maximum Power Added Efficiency(PAE) of 70.2 % at the output power of 43.1 dBm with the saturated power gain of 12.7 dB is achieved by the proposed quasi class-E PA, which is comparable to the performance of the reference class-E PA. Total size of the proposed class-E PA is only $50{\times}50\;mm^2$ and much smaller than the conventional class-E PA that is loaded with a number of open stubs.

Characteristics of Lithium Metal Secondary Battery Using PAN Gel-electrolyte Mixed with TiO2 Ceramic Filler (TiO2 Ceramic Filler가 혼합된 젤상의 PAN 고분자 전해질을 이용한 리튬금속 이차전지의 특성)

  • Lim, Hyo-Sung;Kim, Hyung-Sun;Cho, Byung-Won;Lee, Tae-Hee
    • Journal of the Korean Electrochemical Society
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    • v.5 no.3
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    • pp.106-110
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    • 2002
  • Gel-type polyacrylonitrile(PAN) polymer electrolytes have been prepared using ethylene carbonate(EC), propylene carbonate(PC) and dimethyl carbonate(DMC) plasticizer, $LiPF_6$ salt and $TiO_2$ ceramic filler. Electrochemical properties, such as electrochemical stability, ionic conductivity and compatibility with lithium metal and mechanical properly of polymer electrolytes were investigated. Charge/discharge performance of lithium secondary battery using these polymer electrolytes were investigated. The maximum load that the polymer electrolyte resists increased about two times as a result of adding $TiO_2$ in the polymer electrolyte containing EC and PC. Polymer electrolyte containing EC, PC and $TiO_2$ also showed ionic conductivity of $2\times10^{-3} S/cm$ at room temperature and electrochemical stability window up to 와 4.5V. Polymer electrolyte containing EC, PC, and $TiO_2$ showed the most stable interfacial resistance of $130\Omega$ during 20 days in the impedance spectra of the cells which were constructed by lithium metals as electrodes. Lithium metal secondary battery which employed $LiCoO_2$ cathode, lithium metal anode and $TiO_2$-dispersed polymer electrolyte showed $90\%$ of charge/discharge efficiency at the 1C rate of discharge.

The design of Fully Differential CMOS Operational Amplifier (Fully Differential CMOS 연산 증폭기 설계)

  • Ahn, In-Soo;Song, Seok-Ho;Choi, Tae-Sup;Yim, Tae-Soo;Sakong, Sug-Chin
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.37 no.6
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    • pp.85-96
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    • 2000
  • It is necessary that fully differential operational amplifier circuit should drive an external load in the VLSI design such as SCF(Switched Capacitor Filter), D/A Converter, A/D Converter, Telecommunication Circuit and etc. The conventional CMOS operational amplifier circuit has many problems according to CMOS technique. Firstly, Capacity of large loads are not able to operate well. The problem can be solve to use class AB stages. But large loads are operate a difficult, because an element of existing CMOS has a quadratic functional relation with input and output voltage versus output current. Secondly, Whole circuit of dynamic range decrease, because a range of input and output voltages go down according as increasing of intergration rate drop supply voltage. The problem can be improved by employing fully differential operational amplifier using differential output stage with wide output swing. In this paper, we proposed new current mirror has large output impedance and good current matching with input an output current and compared with characteristics for operational amplifier using cascoded current mirror. To obtain large output swing and low power consumption we suggest a fully differential operational amplifier. The circuit employs an output stage composed new current mirror and two amplifier stage. The proposed circuit is layout and circuit of capability is inspected through simulation program(SPICE3f).

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A 10b 100MS/s 0.13um CMOS D/A Converter Based on A Segmented Local Matching Technique (세그먼트 부분 정합 기법 기반의 10비트 100MS/s 0.13um CMOS D/A 변환기 설계)

  • Hwang, Tae-Ho;Kim, Cha-Dong;Choi, Hee-Cheol;Lee, Seung-Hoon
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.47 no.4
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    • pp.62-68
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    • 2010
  • This work proposes a 10b 100MS/s DAC based on a segmented local matching technique primarily for small chip area. The proposed DAC employing a segmented current-steering structure shows the required high linearity even with the small number of devices and demonstrates a fast settling behavior at resistive loads. The proposed segmented local matching technique reduces the number of current cells to be matched and the size of MOS transistors while a double-cascode topology of current cells achieves a high output impedance even with minimum sized devices. The prototype DAC implemented in a 0.13um CMOS technology occupies a die area of $0.13mm^2$ and drives a $50{\Omega}$ load resistor with a full-scale single output voltage of $1.0V_{p-p}$ at a 3.3V power supply. The measured DNL and INL are within 0.73LSB and 0.76LSB, respectively. The maximum measured SFDR is 58.6dB at a 100MS/s conversion rate.

A Study of Loudspeaker Specifications by the Back Cavity and a change of Electrical Load (스피커의 후면기공과 입력부하의 변화에 따른 스피커의 음향특성)

  • Yon Ju-Bong;Yi Han-Ryang
    • Proceedings of the Acoustical Society of Korea Conference
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    • autumn
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    • pp.233-236
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    • 2001
  • 일반적으로 스피커를 동작시키게 되면, 스피커 보이스 코일에 열이 발생하게 되고, 열에 의한 보이스코일의 저항의 증가가 나타나게 되는데, 기존의 연구는 저음용 스피커(Woofer) 만을 대상으로 스피커의 음향특성 변화들에 관해 수행되었다. 그러나, 현대의 스피커는 A/V시스템분야의 발전에 따라 고음재생의 충실도가 강조되고 있는 경향이므로, 고음용 스피커(Tweeter)에 대한 열 발생의 영향을 조사하였다. 본 연구에서는 고음용 스피커의 입력전력에 따른 특성 변화를 조사하고, 입력전력의 증가로 인한 보이스코일(voice coil)의 저항 증가에 따른 고음용 스피커의 특성변화에 관해 실험하였다. 그리고, 스피커의 진동에 의한 펌프(pump) 역할을 이용하는 냉각용 구멍을 뚫어 스피커의 특성변화를 검토하였다. 실험대상으로는 직경 25mm의 돔(Dome)형 진동판을 가진 고음용 스피커와 이 스피커의 후면 중심부에 구멍을 뚫어 열 방출구가 형성된 3종의 시료를 대상으로 특성변화를 비교$\cdot$측정하였다. 여기에서, 사용된 시료는 국내 Y사의 판매용 고음용 스피커로 제품의 원 상태인, 구멍이 없는 것을 기준시료로 하고, 이와 동일한 제품들의 후면에 각각 직경 5mm, 10mm, 15mm의 구멍을 가공하여 비교시료로 하였다. 기준 및 비교시료의 스피커 특성을, 한국산업규격 KS C 6027의 측정법에 따라, 입력 1W 상태에서 기준시료의 사양을 측정하였고[1], 입력을 0.5W, 1W, 2W, 4W, 8W, 16W로 가하여, 시료별 입력증가에 따른 스피커의 주파수 응답특성, 임피던스(Impedance), 조화 왜(Harmonic Distortion)의 변화율 측정을 통해 스피커의 특성변화 정도를 검토하였다. 향후, 본 연구의 결과는 고음용 스피커의 특성 열화에 대한 예측 및 개선 방안을 제시하는 기본 자료로 활용이 가능할 것으로 사료된다.용하여 현금흐름예측을 할 수 있는 Model을 제시하였다. 특히 건설공사의 현금흐름 예측의 중요한 요소인 Cash-Out에 대하여, 공사비 구성요소인 자재, 노무, 중기, 외주, 경비등 각 Resource의 보할(Weights)을 실 공사원가에 따른 보할의 변화와 Resource들의 Time Lag를 적용 기존 연구자의 Model과 다른 Model을 제시하였다. 또한 기존 연구자들의 Model과 비교하여 편리성, 정확도 및 신뢰성이 높은 Model임도 증명하였다.세대까지도 발현수준이 유지될 것으로 판단된다. 이러한 연구결과는 계통으로 확립된 형질전환 동물에 부여된 새로운 유전형질은 지속적으로 후대로 유전될 수 있음을 제시한다.잖⨀瘀Ā퀇Āゑ잖⨀Ā퀇Ԁ￿™잖⨀䌀Ā퀇ĀꄏĀꀏꄏĀꀏ₱?⨀Ā Ԁ￿䂱?⨀ऀĀ耀Ā삱?⨀؀Ā Ā?⨀ጀĀ耀Ā?돀ꢘ?⨀硩?⨀ႎ?⨀?⨀넆돐쁖잖⨀쁖잖⨀/ࠐ?⨀焆덐瀆倆Āⶇ퍟ⶇ퍟ĀĀĀĀ磀鲕좗?⨀肤?⨀⁅Ⴅ?⨀쀃잖⨀䣙熸ጁ↏?⨀

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X-Band 50 W Pulse-Mode GaN HEMT Internally Matched Power Amplifier (X-대역 50 W급 펄스 모드 GaN HEMT 내부 정합 전력 증폭기)

  • Kang, Hyun-Seok;Bae, Kyung-Tae;Lee, Ik-Joon;Cha, Hyen-Won;Min, Byoung-Gue;Kang, Dong-Min;Kim, Dong-Wook
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.27 no.10
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    • pp.892-899
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    • 2016
  • In this paper, an X-band 50 W internally matched power amplifier is designed and fabricated using an $80{\times}150{\mu}m$ GaN HEMT that is developed by the $0.25{\mu}m$ GaN HEMT process of ETRI. The optimum source and load impedances are experimentally extracted from the loadpull measurement using impedance-transform-prematching circuits, and the transistor performance is predicted. The power performance of the internally matched power amplifier, whose matching circuits are fabricated on a substrate with ${\varepsilon}_r$ of 10.2, is measured under the pulsed mode of $100{\mu}s$ pulse period and 10 % duty cycle, and the best output power of 47.46 dBm(55.5 W) and the power-added efficiency of 46.6 % are obtained at 9.2 GHz. The output power of 47~47.46 dBm(50~55.7 W) is measured in 9.0~9.5 GHz, and the power-added efficiency is measured to be greater than 43 % in 9.0~9.3 GHz and above 36 % in 9.4~9.5 GHz.