• Title/Summary/Keyword: Load impedance

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Analysis of Impedance Performance for Condenser by Harmonic Current Source (고조파 전류원에 의한 콘덴서 임피던스 특성 해석)

  • Kim, Jong-Gyeum;Park, Young-Jeen
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.25 no.4
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    • pp.57-64
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    • 2011
  • Most of the user has been used linear load and non-linear load. The former is usually inductive load which is needed power factor compensation, the latter is power conversion system device. Actually two kinds of load is used together in the customer application. Generally capacitor is used for power-factor compensation of inductive load and reduction harmonics of non linear load with reactor. Non-linear load generates harmonic current for its energy conversion process. If harmonic current pass along the low impedance side of distribution system, the magnification of voltage and current is appeared by the series and parallel resonance. As a result, condenser has received a bitter electrical stress by the harmonic component. In this paper, we analyzed that how resonance is changed by the 5-th harmonic current pattern and proposed an alternative plan for non-magnification.

Mitigation of Negative Impedance Instabilities in a DC/DC Buck-Boost Converter with Composite Load

  • Singh, Suresh;Rathore, Nupur;Fulwani, Deepak
    • Journal of Power Electronics
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    • v.16 no.3
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    • pp.1046-1055
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    • 2016
  • A controller to mitigate the destabilizing effect of constant power load (CPL) is proposed for a DC/DC buck-boost converter. The load profile has been considered to be predominantly of CPL type. The negative incremental resistance of the CPL tends to destabilize the feeder system, which may be an input filter or another DC/DC converter. The proposed sliding mode controller aims to ensure system stability under the dominance of CPL. The effectiveness of the controller has been validated through real-time simulation studies and experiments under various operating conditions. The controller has been demonstrated to be robust with respect to variations in supply voltage and load and capable of mitigating instabilities induced by CPL. Furthermore, the controller has been validated using all possible load profiles, which may arise in modern-day DC-distributed power systems.

A Study on the Characteristics of Corona Critical Voltage and EMTP Simulatuon on Increasing Load Impedance and Pulse Repetition (전극길이 및 펄스반복율에 대한 부하임피던스 특성변화 및 EMTP 해석에 관한 연구)

  • Joung, Jong-Han;Song, Woo-Jung;Jeon, Jin-An;Lee, U-Soo;Kim, Hwi-Young;Kim, Hee-Je
    • Proceedings of the KIEE Conference
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    • 2002.07c
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    • pp.1850-1852
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    • 2002
  • In this paper, we studies EMTP analysis and characteristics of critical voltage of pulse corona and load impedance on variable electrode length. To obtain a stable Pulse voltage, we designed a compact pulse generator switched MOSFET and tested their characteristics by adjusting electrode length and pulse repetition. As a result, critical voltage of pulse corona and load impedance on increasing electrode length were decreased. These results indicate we can control critical voltage of pulse corona and suppress arc discharging between two electrodes.

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A Study on the Characteristics of Corona Critical Voltage on Increasing Load Impedance (전극길이 및 펄스반복율에 대한 부하임피던스 특성변화에 관한 연구)

  • Joung, Jong-Han;Song, Woo-Jung;Jeon, Jin-An;Lee, U-Soo;Kim, Hwi-Young;Kim, Hee-Je
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2002.05a
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    • pp.184-186
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    • 2002
  • In this paper, we studies EMTP analysis and characteristics of critical voltage of pulse corona and load impedance on variable electrode length. To obtain a stable pulse voltage, we designed a compact pulse generator switched MOSFET and tested their characteristics by adjusting electrode length and pulse repetition. As a result, critical voltage of pulse corona and load impedance on increasing electrode length were decreased. These results indicate we can control critical voltage of pulse corona and suppress arc discharging between two electrodes.

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A Study on the Parallel Operation Control Technique of On-line UPS System (무정전전원장치의 병렬운전 제어기법에 관한 연구)

  • 곽철훈;최규하
    • The Transactions of the Korean Institute of Power Electronics
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    • v.8 no.6
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    • pp.585-592
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    • 2003
  • The parallel operation system of UPS is used to increase reliability of power source at critical load. But parallel UPS system has a few defects, impedance is different from each other and circulating current occurs between UPSs, due to line impedance and parameter variation, though controlled by the same synchronization signal. According to such characteristic of parallel UPS, balanced load-sharing control is the most important technique in parallel UPS operation. In this paper, a novel power deviation compensation algorithm is proposed. it is composed of voltage controller to compensate power deviation that be calculated by using active and reactive current deviation between Inverters on synchronous d-q reference frame.

Error Rate Enhancement Algorithm for 13.56 MHz Impedance Automatic Matching System (13.56 MHz 임피던스 자동 정합 시스템을 위한 임피던스 에러율 향상 알고리즘)

  • Jang, Kwang-Ho;Park, Su-Yeon;Choi, Jin-Joo;Lee, Dong-Heon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.29 no.7
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    • pp.484-490
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    • 2018
  • This paper describes an algorithm for calculating load impedance by measuring voltage and current components using a VI sensor in a 13.56 MHz impedance automatic matching system. We propose an algorithm that improves the error rate by using an arbitrary complex calibration load instead of the conventional $50{\Omega}$ calibration load. The error rate is targeted to attain average values of $R_{IN}$ and $X_{IN}$ at 1% and 20% or less, respectively. First, the IF frequency is calculated using a mixer to reduce the error rate. Second, when the arbitrary complex load is used as the calibration load, the error rate $R_{IN}$ decreased from 4.7 % to 0.3 % on average, and $X_{IN}$ decreased from 102 % to 18.3 % on average.

Transistor Wide-Band Feedback Amplifiers (트랜지스터 광대역궤환증폭기)

  • 이병선;이상배
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.5 no.1
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    • pp.13-25
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    • 1968
  • A detailed analysis of the transistor wide-band feedback amplifiers using the hybrid-$\pi$ equivalent circuit has been made. It is considered both for the low freqnency and for the high frequency. The expressions of the gain, bandwidth. input impedance and output impedance have been presented. It is shown that a series feedback amplifier should be driven from the voltage source and should drive into the low resistance load, and a shunt feedback amplifier should be driven from the current source and should drive into the high resistance load. It is also shown that these stages can be coupled without use of the buffer stage or coupling transformer.

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An analytical study on the Effect of High impedance Transformer to reduce Distribution Fault Current (변압기 임피던스 증가에 의한 배전계통의 고장전류 저감방안의 영향분석)

  • Lee, Hyun-Chul;Lee, Geun-Joon;Hyun, Ok-Bae;Hwang, Si-Dol
    • Proceedings of the KIEE Conference
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    • 2009.07a
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    • pp.239_240
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    • 2009
  • This paper presents the brief analytical study on 돋 effects of higher impedance transformer(HIT) to reduce distribution system fault current. With the increase of source and load capacity of power system, fault current of D/L is much more increased and, conventional protection equipment-such as sectionalizer and recloser, have to be replaced higher switching capacity. However, this replacements needs a lot of budget to utility. Increase of transformer impedance is can be a countermeasure in practical basis. This paper compares the voltage and fault current magnitude of both cases -%Zt=20% and %Zt2=33.3%(transformer capacity is 75/100MVA). The simulation results show that the steady state voltage of HIT is dropped 5~6% more in peak load, and fault current was decreased about 5kA by high impedance on transformer.

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Study on Impedance Matching of Microwave IMPATT-Diode Oscillator (임페트 다이오드 마이크로파 발진기에서의 임피이던스 정합에 관한 연구)

  • 윤창용
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.10 no.4
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    • pp.74-79
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    • 1973
  • The Impcdance Matching Condition for maximum power out-pilt cf an Impact oscillator is calculated using the Van der pol's equation. From this calculation, it is found that the load impedance of the oscillator must be one half of the diode impedance for the maximum power output. To get an experimental proof for this result, tole impedance of the Impatt-diode was measured and accordingly the microwave oscillator designed and fabricated. The data obtaiped from the experiments agree fairly closely with the theoretical values.

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Design of Channel Impedance Measurement Equipment for Indoor Power Line Communications (옥내 전력선 통신 채널 임피던스 측정 장치 설계)

  • Heo, Yun-Seok
    • The Journal of Information Technology
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    • v.8 no.3
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    • pp.25-33
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    • 2005
  • This paper describe a method for measuring line impedance as a function of frequency for an energized powerline in normal operation. A small sinusoidal signal of a powerline communication utility frequency 30khz$\sim$1Mhz band is continuously injected into the line, and a implemented impedance analyzer calculates the indoor powerline channel impedance from the measured magnitude and phase of resulting voltage and current. The impedance measurement is executed over a range of frequencies to produce a wideband impedance versus frequency characteristic. Implemented impedance analyzer can analysis powerline communication environments measuring line impedance due to load caused in indoor. And measured analysis information through the database can use to evaluate performance of modem and to decide test environment standard.

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