• Journal of Power Electronics
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• v.7 no.2
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• pp.97-108
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• 2007

This paper describes simple control structures for a vector controlled stand-alone induction generator (IG) for use under variable speeds. Different control principles, indirect vector control and deadbeat current control, are developed for a voltage source PWM converter and the three-phase variable speed squirrel-cage IG to regulate DC-link and generator voltages with a newly designed phase locked loop circuit. The required reactive power for the variable speed IG is supplied by means of a PWM converter and a capacitor bank to buildup the voltage of the IG without the need for a battery, to reduce the rating of the PWM converter while using only three sensors and to eliminate the harmonics generated by the PWM converter. These proposed schemes can be used efficiently for variable speed wind energy conversion systems. The measurements of the IG systems at various speeds and loads are given and show that these systems are capable of good AC and DC voltage regulation.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.11 no.8
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• pp.4061-4076
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• 2017

With the development of high-speed railway technologies, train velocities can now reach speeds up to 350 km/h, and higher in the future. In high-speed railway systems (HSRs), loss of communication can result in serious accidents, especially when the train is controlled through wireless communications. For to this reason, operators of Long Term Evolution for Railway (LTE-R) communication systems install eNodeBs (eNBs) with high density to achieve highly reliable communications. However, densely located eNBs can result in unnecessary frequent handovers (HOs) resulting in instability because, during every HO process, there is a period of time in which the communication link is disconnected. To solve this problem, in this paper, an HO scheme based on the maximum cell residence time (CRT) and adaptive time to trigger (aTTT), which are collectively called CaT, is proposed to reduce unnecessary HOs (using CRT estimations) and decrease HO failures by improving the handover command transmission point (HCTP) in LTE-R HSR communications.

• The KIPS Transactions:PartA
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• v.11A no.1
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• pp.49-56
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• 2004

The performance of the multiprocessor systems is limited by the several factors. The system performance is affected by the processor speed, memory delay, and interconnection network bandwidth/latency. By the evolution of semiconductor technology, off the shelf microprocessor speed breaks beyond GHz, and the processors can be scalable up to multiprocessor system by connecting through the interconnection networks. In this situation, the system performances are bound by the latencies and the bandwidth of the interconnection networks. SCI, Myrinet, and Gigabit Ethernet are widely adopted as a high-speed interconnection network links for the high performance cluster systems. Performance improvement of the interconnection network can be achieved by the bandwidth extension and the latency minimization. Speed up of the operation clock speed is a simple way to accomplish the bandwidth and latency betterment, while its physical distance makes the difficulties to attain the high frequency clock. Hence the system performance and scalability suffered from the interconnection network limitation. Duplicating the link of the interconnection network is one of the solutions to resolve the bottleneck of the scalable systems. Dual-ring SCI link structure is an example of the interconnection network improvement. In this paper, I propose a network topology and a transaction path algorism, which optimize the latency and the efficiency under the duplicated links. By the simulation results, the proposed structure shows 1.05 to 1.11 times better latency, and exhibits 1.42 to 2.1 times faster execution compared to the dual ring systems.

• Proceedings of the Korea Information Processing Society Conference
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• 2006.05a
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• pp.451-454
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• 2006

텔레매틱스 서비스 중 가장 중요한 서비스는 운전자가 요청하는 교통 상황 정보를 신속하고 정확하게 전달해 주는 것이다. 본 논문에서는 GPS 단말기를 장착한 차량들을 통해 수집된 자료를 활용한다. 가까운 과거의 패턴 자료를 이용하여 필터링 범위를 산정한 후, 실시간으로 비정상적인 GPS 자료를 제거하여 링크의 대표 속도 값을 산출하는 방법을 제시한다.

• Proceedings of the Korean Society of Precision Engineering Conference
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• 2004.10a
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• pp.822-825
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• 2004

Continuously variable transmission (CVT) mechanisms considered here is a V-belt drive with two variable-diameter pulleys and effective diameters. One pulley was set by a mechanical link while the other was spring-loaded to provide automatic correspondence. The center distance between the two variable-diameter pulleys was fixed. Experimental studies were executed to analyze efficiencies as change of its speed ratio.

• Proceedings of the KIPE Conference
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• 1998.11a
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• pp.64-67
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• 1998

This paper proposes the hybrid PWM scheme that can obtain less harmonic characteristics in GTO inverters. By employing the variable of the dc-link voltage Vdc, the hybrid PWM pattern can ideally compensate the dc input fluctuation together with selected harmonics elimination. The transient behavior, which the magnetic flux and torque are altered and the large current flows instantly, may be produced when the mode change. To reduce such an undesirable transient behavior, it is also presented the technique for the gear changing of inverter operated with the hybrid PWM. The results are verified by simulations and experiments.

• 제어로봇시스템학회:학술대회논문집
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• 1989.10a
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• pp.194-199
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• 1989

In this paper, using the direct drive arm for plant, the controller is developed to track the desired trajectory in high speed and precision. For the purpose of this, through extending self-tuning pole-placement algorithm, we developed self-tuning pole-shift algorithm which is fast in response and good tracking for the reference tracking change. Developed controller is applied a three-link direct drive arm with the varing payload to track the desired tracking. And, through the computer simulation, the performance of developed controller is compared with the performance of the computed torque method and the self-tuning pole placement algorith.

• Proceedings of the IEEK Conference
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• 2001.06b
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• pp.277-280
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• 2001

The proposed clock generator lowers the operating frequency in a system core though it keeps data bandwidth high because it has a multiphase clocking architecture. Moreover. it has a dual loop which is comprised of an inner analog phase generation loop and outer digital phase control loop. It has both advantages of DLL's wide operating range and DLL's low jitter The proposed design has been demonstrated in terms of the concept and Hspice simulation. All circuits were designed using a 0.25${\mu}{\textrm}{m}$ CMOS process and simulated with 2.5 V power supply.

• 제어로봇시스템학회:학술대회논문집
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• 2000.10a
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• pp.155-155
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• 2000

A high performance control and monitoring system for a high speed railway train requires a reliable the real-time communication network. TCN/WTB is designed for the data transmission over the train bus, and UIC556 defines that all the data be transmitted over TCN/WTB. This paper evaluates the performance of the link layer of WTB(Wired Train Bus). The evaluated results can be used for the selection of parameters for the sporadic message data.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.2 no.2
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• pp.181-186
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• 1998

This paper presents multiplexing structures to provide various subscriber interfaces in an ATM switching system with a high speed internal link, and analyzes the schemes in terms of a mean cell delay and a buffer sin. And we proposed a buffer management strategy to minimize a cell loss and accommodate new ATM transfer capabilities.