• Title/Summary/Keyword: Linear process

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A Head-Eye Calibration Technique Using Image Rectification (영상 교정을 이용한 헤드-아이 보정 기법)

  • Kim, Nak-Hyun;Kim, Sang-Hyun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.37 no.8
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    • pp.11-23
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    • 2000
  • Head-eye calibration is a process for estimating the unknown orientation and position of a camera with respect to a mobile platform, such as a robot wrist. We present a new head-eye calibration technique which can be applied for platforms with rather limited motion capability In particular, the proposed calibration technique can be applied to find the relative orientation of a camera mounted on a linear translation platform which does not have rotation capability. The algorithm find the rotation using a calibration data obtained from pure Translation of a camera along two different axes We have derived a calibration algorithm exploiting the rectification technique in such a way that the rectified images should satisfy the epipolar constraint. We present the calibration procedure for both the rotation and the translation components of a camera relative to the platform coordinates. The efficacy of the algorithm is demonstrated through simulations and real experiments.

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A Highly Linear and Efficient DMB CMOS Power Amplifier with Adaptive Bias Control and 2nd Harmonic Termination circuit (적응형 바이어스 조절 회로와 2차 고조파 종단 회로를 이용한 고선형성 고효율 DMB CMOS 전력증폭기)

  • Choi, Jae-Won;Seo, Chul-Hun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.44 no.1
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    • pp.32-37
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    • 2007
  • A DMB CMOS power amplifier (PA) with high efficiency and linearity is present. For this work, a 0.13-um standard CMOS process is employed and all components of the proposed PA are fully integrated into one chop including output matching network and adaptive bias control circuit. To improve the efficiency and linearity simultaneously, an adaptive bias control circuit is adopted along with second harmonic termination circuit at the drain node. The PA is shown a $P_{1dB}$ of 16.64 dBm, power added efficiency (PAE) of 38.31 %, and power gain of 24.64 dB, respectively. The third-order intermodulation (IMD3) and the fifth-order intermodulation (IMD5) have been -24.122 dBc and -37.156 dBc, respectively.

Strategic Pricing Framework for Closed Loop Supply Chain with Remanufacturing Process using Nonlinear Fuzzy Function (재 제조 프로세스를 가진 순환 형 SCM에서의 비선형 퍼지 함수 기반 가격 정책 프레임웍)

  • Kim, Jinbae;Kim, Taesung;Lee, Hyunsoo
    • Journal of Korean Society of Industrial and Systems Engineering
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    • v.40 no.4
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    • pp.29-37
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    • 2017
  • This papers focuses on remanufacturing processes in a closed loop supply chain. The remanufacturing processes is considered as one of the effective strategies for enterprises' sustainability. For this reason, a lot of companies have attempted to apply remanufacturing related methods to their manufacturing processes. While many research studies focused on the return rate for remanufacturing parts as a control parameter, the relationship with demand certainties has been studied less comparatively. This paper considers a closed loop supply chain environment with remanufacturing processes, where highly fluctuating demands are embedded. While other research studies capture uncertainties using probability theories, highly fluctuating demands are modeled using a fuzzy logic based ambiguity based modeling framework. The previous studies on the remanufacturing have been limited in solving the actual supply chain management situation and issues by analyzing the various situations and variables constituting the supply chain model in a linear relationship. In order to overcome these limitations, this papers considers that the relationship between price and demand is nonlinear. In order to interpret the relationship between demand and price, a new price elasticity of demand is modeled using a fuzzy based nonlinear function and analyzed. This papers contributes to setup and to provide an effective price strategy reflecting highly demand uncertainties in the closed loop supply chain management with remanufacturing processes. Also, this papers present various procedures and analytical methods for constructing accurate parameter and membership functions that deal with extended uncertainty through fuzzy logic system based modeling rather than existing probability distribution based uncertainty modeling.

Study on the High-Frequency Circuit Modeling of the Conducted-Emission from the Motor Drive System of an Electric Vehicle (전기자동차 모터 구동 시스템의 전도 방출에 관한 고주파 모델링 연구)

  • Jung, Kibum;Lee, Jongkyung;Chung, Yeon-Choon;Choi, Jaehoon
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.24 no.1
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    • pp.82-90
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    • 2013
  • In this paper, conducted emission from the MDS(Motor Drive System) of a HEV/EV was analyzed using high- frequency circuit modeling in system-level approach. The conducted emission by PWM process can cause RFI(radio- frequency interference) problems in the AM/FM frequency range. In order to mitigate this conducted emission, a high-frequency equivalent circuit model is proposed by analyzing the fundamental circuits, parasitic components in their parts and connections and non-linear characteristics of IGBTs, high-power capacitors, inverters, motors, high-power cables, and bus bars which are composed of the MDS. It is confirmed that the simulated result by the proposed model is well agreed with measured results in spite of a large-scaled analysis in system level. We are looking forward that this approach can be effectively used in the EMC design of HEV/EV.

2~16 GHz GaN Nonuniform Distributed Power Amplifier MMIC (2~16 GHz GaN 비균일 분산 전력증폭기 MMIC)

  • Bae, Kyung-Tae;Lee, Ik-Joon;Kang, Hyun-Seok;Kim, Dong-Wook
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.27 no.11
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    • pp.1019-1022
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    • 2016
  • In this paper, a 2~16 GHz GaN wideband power amplifier MMIC s designed and fabricated using the nonuniform power amplifier design technique that utilizes drain shunt capacitors to simultaneously provide each transistor with the optimum load impedance and phase balance between input and output transmission lines. The power amplifier MMIC chip that is fabricated using the $0.25{\mu}m$ GaN HEMT foundry process of Win Semiconductors occupies an area of $3.9mm{\times}3.1mm$ and shows a linear gain of larger than 12 dB and an input return loss of greater than 10 dB. Under a continuous-wave mode, it has a saturated output power of 36.2~38.5 dBm and a power-added efficiency of about 8~16 % in 2 to 16 GHz.

STRESS ANALYSIS ON THE DIFFERENT CLASPS OF THE REMOVABLE PARTIAL DENTURE BY THREE-DIMENSIONAL FINITE ELEMENT METHOD (삼차원 유한 요소법에 의한 가철성 국소의치 클래스프의 응력 분석)

  • Park Hong-Ryul;Kim Seong-Kyun;Koak Jai-Young;Heo Seong-Joo;Chang Ik-Tae
    • The Journal of Korean Academy of Prosthodontics
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    • v.43 no.2
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    • pp.218-231
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    • 2005
  • Statement of problem. In the partially edentulous patients, removable partial dentures have been working as a important treatment modality. Clasps, a kind of direct retainers, received some amount of stresses during the insertion and removal of partial denture on the abutment tooth. Purpose. The study is to investigate stresses of the different clasps. Material and methods. In order to investigate the degree of stresses, maxillary partial edentulism (Kennedy Class II modification I) was assumed and removable partial dentures were designed on it with three kinds of metallic materials; cobalt-chromium alloy, type IV gold alloy and commercially pure (c.p.) titanium. Aker's clasp was applied on the left second molar. RPA (mesial rest-proximal plate-Aker's) clasp was on the left first premolar and wrought wire clasp was on the right first premolar. Three dimensional, non-linear, dynamic finite element analysis method was run to solve this process. Results. 1. Cobalt-chromium alloy had the highest von Mises stress value and c.p. titanium had the lowest one irrespective of the types of clasps. 2. In the Aker's clasps, stress on the retentive tips was shown shortly after the appearance of stresses of the middle and minor connector areas. These time lag was much shorter in the RPA clasps than in the Aker's clasp. 3. In general. retentive tips of wrought wire clasps had much less amount of stress than other clasps. Conclusion. The amount of stress was the highest in the RPA clasp and the lowest in the wrought wire clasp, in general.

A Solar Energy Harvesting Circuit with Low-Cost MPPT Control for Low Duty-Cycled Sensor Nodes. (낮은 듀티 동작의 센서 노드를 위한 저비용 MPPT 제어기능을 갖는 빛에너지 하베스팅 회로)

  • Yoon, Eun-Jung;Yang, Min-Jae;Yu, Chong-Gun
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2015.10a
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    • pp.397-400
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    • 2015
  • In this paper a solar energy harvesting system with low-cost MPPT control for low duty-cycled sensor nodes is proposed. The targeted applications are environment, structure monitoring sensor nodes that are not required successively to operate, and MPPT(Maximum Power point Tracking) control using simple circuits is low-cost differently than existing MPPT control. The proposed MPPT control is implemented using linear relationship between the open-circuit voltage of a solar cell. The designed MPPT circuit traces the maximum power point by sampling periodically the open circuit voltage of the solar cell and delivers the maximum available power to the load. The proposed circuit is designed in 0.35um CMOS process. The designed chip area is $975um{\times}1025um$ including pads. Measured results show that the designed system can track the MPP voltage by sampling periodically the open circuit voltage of solar cell.

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The Relationship between Supply Chain Management Performance Metrics and Corporate Value for Firms in Korea by Using Multiple Linear Regression Analysis : Focused on Inventory and Cash-To-Cash Cycle Time (다중회귀분석을 활용한 국내 기업의 공급체인관리 성과지표와 기업 시장가치와의 상관관계 분석 : 재고와 현금화주기를 중심으로)

  • Jahng, Geum-Joo;Yang, Jae-Hwan
    • IE interfaces
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    • v.25 no.2
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    • pp.241-254
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    • 2012
  • This paper studies the relationship between SCM(Supply Chain Management) metrics and corporate value (Tobin's Q) for manufacturing and wholesale/retail firms in Korea. Specifically, the multiple regression analysis is used to investigate the relationships 1) between inventory level, inventory turns, and days of inventory and Tobin's Q and 2) between cash-to-cash (C2C) cycle time including its components such as days of inventory, days sales outstanding, and days payable outstanding and Tobin's Q. The results indicate that there exist statistically significant negative relationships between inventory levels and days of inventory (DOI) and Tobin's Q. Also, we found that there exist commonly known negative correlations between days of raw materials inventory and days of work in process (WIP) inventory and Tobin's Q. For the C2C cycle time, we found that there -exists a statistically significant negative relationship between the C2C cycle time and Tobin's Q. Also, we found that there exist commonly known correlations between the two components of C2C cycle time and Tobin's Q such as the negative for DOI and days sales outstanding. This study clearly shows the negative relationship in general between inventory levels and corporate value and between C2C time and corporate value, and this kind of result has not been found by previous studies in Korea.

Dickson Charge Pump with Gate Drive Enhancement and Area Saving

  • Lin, Hesheng;Chan, Wing Chun;Lee, Wai Kwong;Chen, Zhirong;Zhang, Min
    • Journal of Power Electronics
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    • v.16 no.3
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    • pp.1209-1217
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    • 2016
  • This paper presents a novel charge pump scheme that combines the advantages of Fibonacci and Dickson charge pumps to obtain 30 V voltage for display driver integrated circuit application. This design only requires four external capacitors, which is suitable for a small-package application, such as smart card displays. High-amplitude (<6.6 V) clocks are produced to enhance the gate drive of a Dickson charge pump and improve the system's current drivability by using a voltage-doubler charge pump with a pulse skip regulator. This regulation engages many middle-voltage devices, and approximately 30% of chip size is saved. Further optimization of flying capacitors tends to decrease the total chip size by 2.1%. A precise and simple model for a one-stage Fibonacci charge pump with current load is also proposed for further efficiency optimization. In a practical design, its voltage error is within 0.12% for 1 mA of current load, and it maintains a 2.83% error even for 10 mA of current load. This charge pump is fabricated through a 0.11 μm 1.5 V/6 V/32 V process, and two regulators, namely, a pulse skip one and a linear one, are operated to maintain the output of the charge pump at 30 V. The performances of the two regulators in terms of ripple, efficiency, line regulation, and load regulation are investigated.

A Novel Shared Segment Protection Algorithm for Multicast Sessions in Mesh WDM Networks

  • Lu, Cai;Luo, Hongbin;Wang, Sheng;Li, Lemin
    • ETRI Journal
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    • v.28 no.3
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    • pp.329-336
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    • 2006
  • This paper investigates the problem of protecting multicast sessions in mesh wavelength-division multiplexing (WDM) networks against single link failures, for example, a fiber cut in optical networks. First, we study the two characteristics of multicast sessions in mesh WDM networks with sparse light splitter configuration. Traditionally, a multicast tree does not contain any circles, and the first characteristic is that a multicast tree has better performance if it contains some circles. Note that a multicast tree has several branches. If a path is added between the leave nodes on different branches, the segment between them on the multicast tree is protected. Based the two characteristics, the survivable multicast sessions routing problem is formulated into an Integer Linear Programming (ILP). Then, a heuristic algorithm, named the adaptive shared segment protection (ASSP) algorithm, is proposed for multicast sessions. The ASSP algorithm need not previously identify the segments for a multicast tree. The segments are determined during the algorithm process. Comparisons are made between the ASSP and two other reported schemes, link disjoint trees (LDT) and shared disjoint paths (SDP), in terms of blocking probability and resource cost on CERNET and USNET topologies. Simulations show that the ASSP algorithm has better performance than other existing schemes.

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