• Title/Summary/Keyword: Layout Improvement

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A Study on Design and Implementation Processes of a Smart Factory for Aircraft Parts (항공기 부품 스마트 공장 구축 프로세스 연구)

  • Kim, Byung-Joo;Kim, Deok Hyun;Lee, In Su;Jun, Cha-Soo
    • Journal of Korean Institute of Industrial Engineers
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    • v.43 no.3
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    • pp.229-237
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    • 2017
  • Presented in this paper is a case study of constructing a smart factory for aircraft parts. The construction procedure involves four phases. First of all, its management goals are set, and layout design and simulation are carried out in the conceptual design phase. In the detail design phase, operating scenarios for each module are written out, and probable risks are analyzed by expert groups, and then requirements for developing equipments and subsystems are determined with consideration for element technologies and their integration schemes into the smart factory. In the fabrication and installation phase, system development, equipment fabrication and installation are proceeded in a separate manner, and then integrated together subsequently. In the operation and improvement phase, the factory is stabilized, sophisticated and improved constantly during real operation.

New horizon of earth reinforcement technique - current and future -

  • Otani, Jun
    • Proceedings of the Korean Geotechical Society Conference
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    • 2007.09a
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    • pp.514-527
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    • 2007
  • Earth reinforcement techniques are used worldwide and offer proven solutions to a wide range of geotechnical engineering problems. Here in this paper, recent developments of three major reinforced soil retaining wall methods in Japan were introduced in order to show how the current situation of this technique in Japan is. And the statistical data for the volume of the use was also shown, such as the total volume of the use, the scales of the structures, layout of the earth reinforcement, fill materials, and foundation conditions. Some of the case histories were also introduced with photographs and figures. And then, as one of recent research activity by the author, the study on the application of X-ray CT for the problem of earth reinforcement method combined with other method such as piling and soil improvement was introduced. In this study, a series of model test for several reinforced ground with geogrids was conducted using a newly developed test apparatus. Then, the behavior in the soil box was scanned after settlement using X-ray CT scanner. Based on these test results, the reinforcing effect by the geogrids and the soil arching effect over the pile heads was discussed precisely and those are done in 3-D with nondestructive condition. Finally, the effectiveness of the use of X-ray CT scanner in geotechnical engineering was promised.

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A Study on the Fire Evacuation Assessment Considering Occupied Environment Variation in Existing Buildings (기존 건축물의 사용승인허가 전·후 거주환경을 고려한 화재피난성능평가 연구)

  • Kim, Hak Kyung;Choi, Doo Chan;Kim, In Tae;Kim, Hee Moon;Sim, Hye In
    • Fire Science and Engineering
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    • v.30 no.6
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    • pp.105-110
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    • 2016
  • In Korea, fire hazard and risk analysis and response management planning related to existing decrepit buildings, including interior construction and architectural layout revision, due to various occupancy purposes have not been researched or established. Therefore, regulations and technical standards that can manage and reduce fire hazards and risks based on fire hazard analysis and evaluation are required. This study was performed based on a site survey and fire evacuation assessment including performancebased analysis in 3 actual existing buildings to find the life safety issues and provide improvement recommendations.

Field instrumentation and settlement prediction of ground treated with straight-line vacuum preloading

  • Lei, Huayang;Feng, Shuangxi;Wang, Lei;Jin, Yawei
    • Geomechanics and Engineering
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    • v.19 no.5
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    • pp.447-462
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    • 2019
  • The vacuum preloading method has been used in many countries for ground improvement and land reclamation works. A sand cushion is required as a horizontal drainage channel for conventional vacuum preloading. In terms of the dredged-fill foundation soil, the treatment effect of the conventional vacuum preloading method is poor, particularly in Tianjin, China, where a shortage of sand exists. To solve this problem, straight-line vacuum preloading without sand is widely adopted in engineering practice to improve the foundation soil. Based on the engineering properties of dredged fill in Lingang City, Tianjin, this paper presents field instrumentation in five sections and analyzes the effect of a prefabricated vertical drain (PVD) layout and a vacuum pumping method on the soft soil ground treatment. Through the arrangement of pore water pressure gauges, settlement marks and vane shear tests, the settlement, pore water pressure and subsoil bearing capacity are analyzed to evaluate the effect of the ground treatment. This study demonstrates that straight-line vacuum preloading without sand can be suitable for areas with a high water content. Furthermore, the consolidation settlement and consolidation degree system is developed based on the grey model to predict the consolidation settlement and consolidation degree under vacuum preloading; the validity of the system is also verified.

Vision chip for edge detection with resolution improvement through simplification of unit-pixel circuit (단위 픽셀 회로의 간소화를 통해서 해상도를 향상시킨 이차원 윤곽 검출용 시각칩)

  • Sung, Dong-Kyu;Kong, Jae-Sung;Hyun, Hyo-Young;Shin, Jang-Kyoo
    • Journal of Sensor Science and Technology
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    • v.17 no.1
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    • pp.15-22
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    • 2008
  • When designing image sensors including a CMOS vision chip for edge detection, resolution is a significant factor to evaluate the performance. It is hard to improve the resolution of a bio-inspired CMOS vision using a resistive network because the vision chip contains many circuits such as a resistive network and several signal processing circuits as well as photocircuits of general image sensors such as CMOS image sensor (CIS). Low resolution restricts the use of the application systems. In this paper, we improve the resolution through layout and circuit optimization. Furthermore, we have designed a printed circuit board using FPGA which controls the vision chip. The vision chip for edge detection has been designed and fabricated by using $0.35{\mu}m$ double-poly four-metal CMOS technology, and its output characteristics have been investigated.

The Criteria Improvement on the Designation of Historic Cultural Environment Conservation Area and the Current Conditions Alteration in Non-Urbanized Area - A special Emphasis on Chosun Royal Tombs in Gyeonggi - (비시가화지역 역사문화환경 보존지역의 설정 기준 및 현상변경기준의 개선 방안 - 경기도 소재 조선왕릉을 중심으로 -)

  • Choi, Hyung-Seok
    • Journal of Korean Society of Rural Planning
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    • v.19 no.3
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    • pp.117-129
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    • 2013
  • The Historic Cultural Environment Conservation Areas around Chosun Royal Tombs in Gyeonggi Province are larger than those around other Cultural Assets, so more efficient management tools on the Areas should be needed. This study aims to suggest the directions of policy to modify the existing management tools by analyzing the spatial extent and alteration standards of the 12 Historic Cultural Environment Conservation Areas around Chosun Royal Tombs in Gyeonggi Province. The results of this study are as follows: First, in most cases, the spatial extents of the Areas are 500m, but the spatial extents should be precisely classified in Gyeonggi Ordinance of Cultural Assets Protection, and be excluded according to the layout of Protection Areas and roads. And the outside view from the inside is more important in Chosun Royal Tombs, so the areas on the axis of the view must be controled by considering the development density(bulk or height of buildings). Second, the same zoning areas must be classified as the same section of the Area allowing for equity, and Finally, the Current Conditions Permission Criteria should be actualized to take into account the difference between the development densities of zoning araes and the Criteria.

Composite Wood-Concrete Structural Floor System with Horizontal Connectors

  • SaRibeiro, Ruy A.;SaRibeiro, Marilene G.
    • International Journal of Concrete Structures and Materials
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    • v.9 no.1
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    • pp.61-67
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    • 2015
  • The concept of horizontal shear connection utilization on wood-concrete beams intends to be an alternative connection detail for composite wood-concrete decks. The volume of sawn-wood is over three times more expensive than concrete, in Brazil. In order to be competitive in the Brazilian market we need a composite deck with the least amount of wood and a simple and inexpensive connection detail. This research project uses medium to high density tropical hardwoods managed from the Brazilian Amazon region and construction steel rods. The beams studied are composed of a bottom layer of staggered wood boards and a top layer of concrete. The wood members are laterally nailed together to form a wide beam, and horizontal rebar connectors are installed before the concrete layer is applied on top. Two sets of wood-concrete layered beams with horizontal rebar connectors (6 and 8) were tested in third-point loading flexural bending. The initial results reveal medium composite efficiency for the beams tested. An improvement on the previously conceived connection detail (set with six connectors) for the composite wood-concrete structural floor system was achieved by the set with eight connectors. The new layout of the horizontal rebar connectors added higher composite efficiency for the beams tested. Further analysis with advanced rigorous numerical Finite Element Modeling is suggested to optimize the connection parameters. Composite wood-concrete decks can attend a large demand for pedestrian bridges, as well as residential and commercial slabs in the Brazilian Amazon.

Decrease of Parasitic Capacitance for Improvement of RF Performance of Multi-finger MOSFETs in 90-nm CMOS Technology

  • Jang, Seong-Yong;Kwon, Sung-Kyu;Shin, Jong-Kwan;Yu, Jae-Nam;Oh, Sun-Ho;Jeong, Jin-Woong;Song, Hyeong-Sub;Kim, Choul-Young;Lee, Ga-Won;Lee, Hi-Deok
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.15 no.2
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    • pp.312-317
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    • 2015
  • In this paper, the RF characteristics of multi-finger MOSFETs were improved by decreasing the parasitic capacitance in spite of increased gate resistance in a 90-nm CMOS technology. Two types of device structures were designed to compare the parasitic capacitance in the gate-to-source ($C_{gs}$) and gate-to-drain ($C_{gd}$) configurations. The radio frequency (RF) performance of multi-finger MOSFETs, such as cut-off frequency ($f_T$) and maximum-oscillation frequency ($f_{max}$) improved by approximately 10% by reducing the parasitic capacitance about 8.2% while maintaining the DC performance.

The Design of carry increment Adder Fixed Fan-out (팬 아웃이 고정된 carry increment 덧셈기 설계 방법)

  • Kim, Yong-Eun;Chung, Jin-Gyun
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.45 no.2
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    • pp.44-48
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    • 2008
  • According to increment of stage, the speed of changeable stage Carry-increment adder can be close to $O(\sqrt{2n})$ because the word length which is computed in stage can be lengthened by 1 bit. But the number of stage bits is increased, fan-out of carry which is inputted in stage is increased. So tile speed can be slow. This paper presents a new carry-increment adder design method to fix the number of fan-outs regardless of the number of stages. By layout simulation of 37-bit adder, the area can be Increased up to 40%, but speed improvement up to 75% can be achieved, by the proposed method, compared with a conventional method.

Design Improvement and Measurement of a Rapid Single Flux Quantum Confluence Buffer

  • Baek, Seung-Hun;Kim, Jin-Young;Kim, Sehoon;Kang, Joonhee;Jungb, Ku-Rak;Park, Jong-Hyeok;Hahnb, Teak-Shang
    • Progress in Superconductivity and Cryogenics
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    • v.6 no.4
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    • pp.41-45
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    • 2004
  • Rapid Single flux quantum (RSFQ) confluence buffer is widely used in complex superconductive digital circuits. In this work, we have improved the currently used confluence buffer and obtained a more soundly designed confluence buffer. In simulations, improvements in the bias margins of 11 % and the global margins of 10%, compared to the previously used confluence buffer, were achieved. Global margins are very important in estimating a process error range allowed in fabrications. We used two circuit simulation tools, WRspice and Julia, to design and optimize the confluence buffer. We used Xic to obtain a mask layout. We fabricated the improved circuits by using Nb technology. The test results at low frequency showed that the improved confluence buffer operated correctly and had a very wide main bias margin of +/-43% enhanced from +/-26% of the previously used confluence buffer.