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The Design of carry increment Adder Fixed Fan-out  

Kim, Yong-Eun (Div. of Electronic & Information Engineering, Chonbuk University)
Chung, Jin-Gyun (Div. of Electronic & Information Engineering, Chonbuk University)
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Abstract
According to increment of stage, the speed of changeable stage Carry-increment adder can be close to $O(\sqrt{2n})$ because the word length which is computed in stage can be lengthened by 1 bit. But the number of stage bits is increased, fan-out of carry which is inputted in stage is increased. So tile speed can be slow. This paper presents a new carry-increment adder design method to fix the number of fan-outs regardless of the number of stages. By layout simulation of 37-bit adder, the area can be Increased up to 40%, but speed improvement up to 75% can be achieved, by the proposed method, compared with a conventional method.
Keywords
Increment adder; Fan-out;
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