• The korean journal of orthodontics
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• v.44 no.5
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• pp.246-253
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• 2014

Objective: To evaluate the bioactivity, and the biomechanical and bone-regenerative properties of Ti6Al4V miniscrews subjected to anodization, cyclic precalcification, and heat treatment (APH treatment) and their potential clinical use. Methods: The surfaces of Ti6Al4V alloys were modified by APH treatment. Bioactivity was assessed after immersion in simulated body fluid for 3 days. The hydrophilicity and the roughness of APH-treated surfaces were compared with those of untreated (UT) and anodized and heat-treated (AH) samples. For in vivo tests, 32 miniscrews (16 UT and 16 APH) were inserted into 16 Wistar rats, one UT and one APH-treated miniscrew in either tibia. The miniscrews were extracted after 3 and 6 weeks and their osseointegration (n = 8 for each time point and group) was investigated by surface and histological analyses and removal torque measurements. Results: APH treatment formed a dense surface array of nanotubular TiO2 layer covered with a compact apatite-like film. APH-treated samples showed better bioactivity and biocompatibility compared with UT and AH samples. In vivo, APH-treated miniscrews showed higher removal torque and bone-to-implant contact than did UT miniscrews, after both 3 and 6 weeks (p < 0.05). Also, early deposition of densely mineralized bone around APH-treated miniscrews was observed, implying good bonding to the treated surface. Conclusions: APH treatment enhanced the bioactivity, and the biomechanical and bone regenerative properties of the Ti6Al4V alloy miniscrews. The enhanced initial stability afforded should be valuable in orthodontic applications.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.31 no.3
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• pp.129-134
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• 2018

Herein, we report the manufacture of high-performance, ambipolar organic field-effect transistors (OFETs) and complementary-like electronic circuitry based on a blended, polymeric, semiconducting film. Relatively high and well-balanced electron and hole mobilities were achieved by incorporating a small amount of ionic additives. The equivalent P-channel and N-channel properties of the ambipolar OFETs enabled the manufacture of complementary-like inverter circuits with a near-ideal switching point, high gain, and good noise margins, via a simple blanket spin-coating process with no additional patterning of each active P-type and N-type semiconductor layer.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.4
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• pp.759-764
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• 2012

Copper Pillar Tin Bump (CPTB) was investigated for high density chip interconnect technology development, which was prepared by electroplating and electro-less plating methods. Copper pillar tin bumps that have $100{\mu}m$ pitch were introduced with fabrication process using a KM-1250 dry film photoresist (DFR), with copper electroplating for Copper Pillar Bump (CPB) formation firstly, and then tin electro-less plating on it for control oxidation. Electric resistivity and mechanical shear strength measurements were introduced to characterize the oxidation effects and bonding process as a function of thermo-compression. Electrical resistivity increased with increasing oxidation thickness, and shear strength had maximum value with $330^{\circ}C$ and 500 N at thermo-compression process. Through the simulation work, it was proved that the CPTB decreased in its size of conduction area as time passes, however it was largely affected by the copper oxidation.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.14 no.7
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• pp.1647-1652
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• 2010

A CdS film has been used as a window layer in CdTe and Cu(In,Ga)$Se_2$ thin films solar cell. Partial substitution of Zn for Cd increases the photocurrent and the open-circuit voltage by providing a match in the electron affinities of the two materials and the higher band gap. In this paper, CdZnS/CdTe and CdS/CdTe heterojunctions were fabricated and the electrical characteristics were investigated. Current-voltage-temperature measurements showed that the current transport for CdS/CdTe heterojunction was controlled by both tunneling and interface recombination. However, CdZnS/CdTe heterojunction displayed different current transport mechanism with the operating temperature. For above room temperature, the current transport of device was generation/recombination in the depletion region and was the leakage current and/or tunneling in the range below room temperature.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.7
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• pp.50-57
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• 1989

Tapered etching of polysilicon films has been achieved by implanting phosphorus ions into the polysilicon film and using plasma etch in either $CF_4-O_2\;or\;SF_6$. A two-step plasma etching method is also proposed to control the taper angle of the etched edge without changing the implantion conditions. The taper angle is determined by the ratio of the etch rate of the undamaged region to that of the damaged top region of the polysilicon layer. The ratio is found to be dependent on the implantion dose, the implantion energy and the anisotropy of etching. The minimum angle in our experiments is about $10^{\circ}$. When the two-step etching method is employed, the taper angles can be controlled from the minimum angle up to about $55^{\circ}$.

• Journal of the Microelectronics and Packaging Society
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• v.27 no.3
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• pp.73-76
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• 2020

Silver nanowires (AgNWs) intrinsically possess high conductivity, ductility, and network structure percolated in a low density, which have led to many advanced applications of transparent and flexible electronics. Most of these applications require patterning of AgNWs, for which photolithographic and printing-based techniques have been widely used. However, several drawbacks such as high cost and complexity of the process disturb its practical application with patterning AgNWs. Herein, we propose a novel method for the patterning of AgNWs by employing UV-curable adhesive tape with a structure of liner/adhesive layer/polyolefin (PO) film and UV irradiation to simplify the process. First, the UV-curable adhesive tape was attached to AgNWs/polyurethane (PU), and then selectively exposed to UV irradiation by using a photomask. Subsequently, the UV-curable adhesive tape was peeled off and consequently AgNWs were patterned on PU substrate. This facile method is expected to be applicable to the fabrication of a variety of low-cost, shape-deformable transparent and wearable devices.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2010.10a
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• pp.726-729
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• 2010

Copper Pillar Tin Bump (CPTB) was investigated for high density chip interconnect technology development, which was prepared by electroplating and electro-less plating methods. Copper pillar tin bumps that have $100{\mu}m$ pitch were introduced with fabrication process using a KM-1250 dry film photoresist (DFR), with copper electroplating for Copper Pillar Bump (CPB) formation firstly, and then tin electro-less plating on it for control oxidation. Electric resistivity and mechanical shear strength measurements were introduced to characterize the oxidation effects and bonding process as a function of thermo-compression. Electrical resistivity increased with increasing oxidation thickness, and shear strength had maximum value with $330^{\circ}C$ and 500 N thermo-compression process. Through the simulation work, it was proved that when the CPTB decreased in its size, it was largely affected by the copper oxidation.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.18 no.2
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• pp.87-90
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• 2008

Co-Pt alloy thin films were galvanostatically electrodeposited on Ru (30 nm)/Ta (5 nm)/Si (100) substrates from a amino-citrate based electrolyte. We used Ru(0002)-oriented buffer layers to control the crystallinity and orientation of the Co-Pt alloy thin films. The effect of solution temperature on the microstructure and magnetic properties of the Co-Pt alloy thin film was investigated. The samples were characterized by EDS, FESEM, XRD diffractometer using Cu $K{\alpha}$ radiation. The magnetic properties of these films were analyzed by a VSM and torque magnetometer. The Co-Pt alloy thin films were exhibited very high out-of-plane coercivity and squareness of the multilayer were 6527 Oe and 0.93, respectively, without heat treatment.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.30 no.12
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• pp.751-756
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• 2017

A molding-type power inductor is an inductor that uses a hybrid material that is prepared by mixing a ferrite metal powder coated with an insulating layer and an epoxy resin, which is injected into a coil-embedded mold and heated and cured. The fabrication of molding-type inductors requires various techniques such as for coil formation and insertion, improving the magnetic properties of soft magnetic metal powder, coating an insulating film on the magnetic powder surface, and increasing the packing density by well dispersing the powder in the epoxy resin. Among these aspects, researches on additives that can disperse the metal soft magnetic powder having the greatest performance in the epoxy resin with high charge have not been reported yet. In this study, we investigated the effect of silanes, KBM-303 and KBM-403, and a commercial dispersant on the dispersion of metal soft magnetic powders in epoxy resin. The sedimentation height and viscosity were measured, and it was confirmed that the silane KBM-303 was suitable for dispersion. For this silane, the packing density was as high as about 72.49%. Moreover, when 1.2 wt% of dispersant BYK-103 was added, the packing density was about 80.5%.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2003.11a
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• pp.221-225
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• 2003

The MFIS-FET(Field Effect Transistor) devices using $BLT/Y_2O_3$ buffer layer on p-Si(100) substrates were fabricated by the Sol-Gel method and conventional memory processes. The crystal structure, morphologies and electrical properties of prepared devices were investigated by using various measuring techniques. From the C-V(capacitance-voltage) data at 5V, the memory window voltage of the $Pt/BLT/Y_2O_3/si$ structure decreased from 1.4V to 0.6V with increasing the annealing temperature from $700^{\circ}C\;to\;750^{\circ}C$. The drain current (Ic) as a function of gate voltages $(V_G)$ for the $MFIS(Pt/BLT/Y_2O_3/Si(100))-FET$ devices at gate voltages $(V_G)$ of 3V, 4V and 5V, the memory window voltages increased from 0.3V to 0.8V as $V_G$ increased from 3V to 5V.