• Title/Summary/Keyword: Latching current

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Study of Characteristics of Dual Channel Trench IGBT (Dual Channel을 가진 Trench Insulated Gate Biploar Transistor(IGBT)특성 연구)

  • Moon, Jin-Woo;Chung, Sang-Koo
    • Proceedings of the KIEE Conference
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    • 2001.07c
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    • pp.1469-1471
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    • 2001
  • A Dual Channel Trench IGBT (Insulated Gate Bipolar Transistor) is proposed to improve the latch-up characteristics. Simulation results by MEDICI have shown that the latching current density of proposed device was found to be 2850 A/$cm^2$ while that of conventional device was 1610 A/$cm^2$. The latching current desity of the proposed strucutre was 77.02% higher than that of conventional structre.

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A Study on the Fuse Sizing Technique for the Protection of Satellite Power System (인공위성 전력 시스템 보호를 위한 퓨즈 선정 기법 연구)

  • Jeon, Hyeon-Jin;Lim, Seong-Bin;Lee, Sang-Rok
    • Aerospace Engineering and Technology
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    • v.11 no.1
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    • pp.1-6
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    • 2012
  • Power system in satellite is protected by installing fuses, LCLs (Latching Current Limiters), etc. between satellite power supply and loads. In this paper, the fuse sizing technique for satellite power system protection is addressed. Detailed fuse sizing method is explained and it is shown that the single fuse connection method is mathematically subordinated to the parallel fuse connection method. In addition, appropriate fuse selection method is newly suggested under a situation where exact current characteristics of a load connected to a fuse is unknown.

The Analysis of the LCL Set-up Parameters for Satellite Power Distribution (위성전원분배를 위한 LCL 동작 파라미터 설정분석)

  • Lim, Seong-Bin;Jeon, Hyun-Jin;Kim, Kyung-Soo;Kim, Tae-Youn
    • Aerospace Engineering and Technology
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    • v.10 no.2
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    • pp.56-64
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    • 2011
  • In this paper, the characteristics of LCL set-up parameters for the satellite load distribution are analyzed under the electrical system environment, implemented the LCL circuits and evaluated the performance and its behaviour. Recently, it is implemented the load distribution circuit by latching current limiter(LCL) rather than conventional fuse and relay for the protection of the satellite power system from a fault load. The LCL circuit is composed of the electrical components, not mechanical parts with the fuse and relay. When detected the over current on a fault load, it is activated to maintain the trip-off level for set-up time and then cut-off the load power by the active control. It is more flexible and provided a chance to reuse of the load in case of temporarily event, but the fuse and relay can't be used again after activating due to the physical disconnection. However, for implementation of LCL circuit, it should be carefully considered the behavior of the LCL circuit under the worst electrical system environment and applied it to define the set-up parameters related with over-current inhibition.

A novel IGBT with improved electrical characteristics (향상된 전기적 특성을 갖는 IGBT에 관한 연구)

  • Koo, Yong-so
    • The Journal of Korea Institute of Information, Electronics, and Communication Technology
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    • v.6 no.3
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    • pp.168-173
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    • 2013
  • In this paper, we tried different two approach to improve the performance of the IGBT. The first approach is that adding N+ region beside P-base in the conventional IGBT. It can make the conventional IGBT to get faster turn-off time and lower conduction loss. The second approach is that adding P+ region on right side under gate to improve latching current of conventional IGBT. The device simulation results show improved on-state, latch-up and switching characteristics in each structure. The first one was presented lower voltage drop(3.08V) and faster turn-off time(3.4us) than that of conventional one(3.66V/3.65us). Also, second structure has higher latching current(369A/?? ) that of conventional structure. Finally, we present a novel IGBT combined the first approach with second one for improved trade-off characteristic between conduction and turn-off losses. The proposed device has better performance than conventional IGBT.

Analysis of the electrical characteristics of SOI LIGBT with dual-epi layer (이중 에피층을 가지는 SOI LIGBT의 전기적 특성분석)

  • Kim, Hyoung-Woo;Kim, Sang-Cheol;Kim, Ki-Hyun;Kim, Eun-Dong
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.07a
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    • pp.288-291
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    • 2004
  • Due to the charge compensation effect, SOI(Silicon-On-Insulator) LIGBT with dual-epi layer have been found to exhibit both low forward voltage drop and high static breakdown voltage. In this paper, electrical characteristics of the SOI LIGBT with dual-epi structure is presented. Trenched anode structure is employed to obtain uniform current flowlines and shorted anode structure also employed to prevent the fast latch-up. Latching current density of the proposed LIGBT with $T_1=T_2=2.5{\mu}m,\;N_1=7{\times}10^{15}/cm^3,\;N_2=3{\times}10^{15}/cm^3$ is $800A/cm^2$ and breakdown voltage is 125V while latching current density and breakdown voltage of the conventional LIGBT is $700A/cm^2$ and 55V.

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Study on the Characteristic Analysis and the Design of the IGBT Structure with Trap Injection for Improved Switching Characteristics (트랩 주입의 구조적 설계에 따른 LIGBT의 전기적 특성 개선에 관한 연구)

  • Gang, Lee-Gu;Chu, Gyo-Hyeok;Kim, Sang-Sik;Seong, Man-Yeong
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.49 no.8
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    • pp.463-467
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    • 2000
  • In this paper, the new LIGBT structures with trap injection are proposed to improve switching characteristics of the conventional SOI LIGBT. The Simulations are performed in order to investigate the effects of the positiion, whidth and concentration of trap injection region with a reduced minority carrier lifetime using 2D device simulator MEDICI. Their electrical characteristics are analyzed and the optimum design parameters are extracted. As a result of simulation, the turn off time for the model A with the trap injection is $0.78\mus$. These results indicate the improvement of about 2 times compared with the conventional SOI LIGBT because trap injection prevents minority carriers which is stored in the n-drift region during turn off switching. The latching current is $1.5\times10^{-4}A/\mum$ and forward blocking voltage is 168V which are superior to those of conventional structure. It is shown that the trap injection is very effective to reduce the turn off time with a little increasing of on-state voltage drop if its design and process parameters are optimized.

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A Novel Inserted Trench Cathode IGBT Device with High Latching Current (높은 latch-up 전류특성을 갖는 트랜치 캐소드 삽입형 IGBT)

  • 조병섭;곽계달
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.30A no.7
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    • pp.32-37
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    • 1993
  • A novel insulated gate bipolar transister (IGBT), called insulated trench cathode IGBT (ISTC-IGBT), is proposed. ISTC-IGBT has a trenched well with the shallow P$^{+}$ juction in the conventional IGBT structure. The proposed structure has the capability of effectively suppressing the parasitic thyristor latchup. The holding current of ISTC-IGBT is about 2.2 times greater than that of the conventional IGBT. Detailed analysis of the latchup characteristics of ISTC-IGBT is performed by using the two-dimensional device simulator, PISCES-II B.

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Latching Current Limiter for Satellite (위성 탑재용 래칭 전류 리미터)

  • Kim, Du-Il;Kim, Hee-Jun;Han, Sang-Chul
    • Proceedings of the KIEE Conference
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    • 2005.07b
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    • pp.1368-1370
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    • 2005
  • Satellite is operated only with internal battery when separated from rocket. Internal battery is charged only from SAR(solar Array Regulator), solar cell. So battery will be exhausted and purpose of satellite will be failed if load module is out of order or short. This paper proposed real time current limiter which operated by telemetry of outer processor. This current limiter operates by control signal simultaneously cuts off over current by self over current sensing circuit. So it can reduce waste of battery energy and over load of outer processor.

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Study of the Device Characteristics of The Base Resistance Controlled Thyristor With The Self-Align Corrugated P-base (자기정렬된 물결모양 P-베이스를 갖는 베이스 저항 제어 사이리스터의 소자특성에 관한 연구)

  • Lee, Yu-Sang;Byeon, Dae-Seok;Lee, Byeong-Hun;Kim, Du-Yeong;Han, Min-Gu;Choe, Yeon-Ik
    • The Transactions of the Korean Institute of Electrical Engineers C
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    • v.48 no.3
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    • pp.167-172
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    • 1999
  • The device characteristics of the base resistance controlled thyristor with self-align corrugated p-base is demonstrated for the first time with varying the n+ cathode width and the temperature form room temperature to $125^{\circ}C$. The experimental results show that the snap-back in the CB-BRT is significantly suppressed irrespective of the various n+ cathode width and the temperature as compared with that of the conventional BRT. The maximum controllable current of the CB-BRT is uniformly higher when compared with that of the conventional BRT over the temperature range from room temperature to $125^{\circ}C$.

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Analysis of the Bouncing Phenomenon due to the Deterioration of the Relay Contact (릴레이 접점 열화에 따른 바운싱 현상 분석)

  • Ryu, Jae-Man;Choi, Sun-Ho;Park, Ki-Hoon;Huh, Chang-Su
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.27 no.6
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    • pp.383-388
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    • 2014
  • The relay used is gradually increased. Because it is possible to easily control the high voltage and current. Bounce phenomenon is generated in contact during operation relay. As the result, arc is generated at the contact, thereby shortening the contact lifetime. In this study, we analyzed the bouncing phenomenon due to deterioration. It can be seen from the experimental results, and it is minimized at about 100,000 times. Bouncing phenomenon to increase again after the minimization. Consequently, the bouncing related to contact weight and shape of contact surface.