• Journal of Korea Foundry Society
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• v.23 no.5
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• pp.235-243
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• 2003

The collapsibility of sodium silicate-bonded sands mixed with the L.D converter slag powder to form a hardener were investigated. Five to six percent sodium silicate on the basis of silica sand and 30-40% L.D converter slag powder on the basis of sodium silicate, were mixed and the compressive strength, surface stability index(SSI), bench time, retained strength of the standard sand specimens were measured. The properties were similar to those of general inorganic bonded self-setting molds. The compressive strength and surface stability index were increased and the retained strength and bench time were decreased with increased amount of the L.D converter slag powder. The retained strength of sodium silicate-bonded self-setting molds with the L.D converter slag powder were decreased than $CO_2$ sand molds. The collapsibility of sodium silicate-bonded self-setting molds with the L.D converter slag powder were superior in comparison with $CO_2$ sand molds. The L.D converter slag powder could be used as hardener and collapse agent for the sodium silicate-bonded self-setting molds.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.31A no.6
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• pp.98-106
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• 1994

To realize high accuracy and high speed we developed a new self compensation scheme and applied it to a 10-bit D/A converter. This circuit can compensate the device mismatch without interrupting the D/A converter operation. With the compensation circuit,INA decreased down to 0.22LSB from 0.47LSB. The device was fabricated using a 0.8$\mu$m CMOS process. The area of the D/A converter core is 3.2mm$^{2}$ and the area of the compensation part is 0.64mm$^{2}$.

• The Transactions of the Korean Institute of Power Electronics
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• v.18 no.1
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• pp.91-102
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• 2013

This paper proposes the improved LCCT(Inductor-Capacitor-Capacitor-Trans) Z-source DC-DC converter (Improved LCCT ZSDC) which can generate the bipolar output voltages according to duty ratio D. The proposed converter has the characteristic and structure of Quasi Z-source DC-DC converter(Quasi ZSDC) and conventional LCCT Z-source DC-DC converter(LCCT ZSDC). To confirm the validity of the proposed method, PSIM simulation and a DSP based experiment were performed for each converter. In case which the input DC voltage is 70V, the bipolar output DC voltage of positive 90V and negative 50V could generate. Also, as comparison result of the capacitor voltage ripple in Z-network and the input current under the same condition for each converter, the voltage stress and the capacitor voltage in Z-network of the proposed method were lower compared with the conventional methods. Finally, the efficiency for each method was investigated according to load variation and duty ratio D.

• Proceedings of the KIEE Conference
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• 1997.07f
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• pp.2159-2161
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• 1997

This paper presents the investigations and the reduction methods for EMI in the Elevator(E/L) system. In the large capacity E/L. Power factor controlled IGBT converter is used, so that the conducted EMI level is mostly determined by a high frequency input current. We suggest the low cost EMI countermearsure for E/L system using by a LCL filter ed a low cost noise filter.

• Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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• 2002.02a
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• pp.131-134
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• 2002

In this work, we have developed a systematic way of utilizing the basic design tools for superconductive electronics. This include WRSPICE, XIC, margin program, and L-meter. Since the high performance analog-to- digital converter can be built with Rapid Single Flux Quantum (RSFQ) logic circuits the development of superconductive analog-to-digital converter has attracted a lot of interests as one of the most prospective area of the application of Josephson Junction technology. One of the main advantages in using Rapid Single Flux Quantum logic in the analog-to-digital converter is the low voltage output from the Josephson junction switching, and hence the high resolution. To design an 1-bit analog-digital converter, first we have used XIC tool to compose a circuit schematic, and then studied the operational principle of the circuit with WRSPICE tool. Through this process, we obtained the proper circuit diagram of an 1-bit analog-digital converter circuit. Based on this circuit we performed margin calculations of the designed circuits and optimized circuit parameters. The optimized circuit was laid out as a mask drawing. Inductance values of the circuit layout were calculated with L-meter. Circuit inductors were adjusted according to these calculations and the final layout was obtained.

• The Transactions of the Korean Institute of Power Electronics
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• v.25 no.1
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• pp.54-60
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• 2020

A digital current control scheme using virtual d-q transformation for a boost single-phase power factor correction (PFC) converter is proposed. The use of virtual d-q transformation in single-phase power converters is known to improve current control performance. However, the conventional virtual d-q transformation-based digital current control scheme cannot be directly applied to the boost single-phase PFC converter because the current and average voltage waveforms of the inductor used in the converter are not sinusoidal. To cope with this problem, this study proposes a virtual sinusoidal signal generation method that converts the current and average voltage waveform of the inductor into a sinusoidal waveform synchronized with the grid. Simulation and experimental results are provided to show that the virtual d-q transformation-based digital current control is successfully applied to the boost single-phase PFC converter with the aid of the proposed virtual sinusoidal signal generation method.

• Proceedings of the Korean Institute of Resources Recycling Conference
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• 1993.03a
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• pp.11.2-12
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• 1993

• Proceedings of the KIEE Conference
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• 2007.10a
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• pp.481-482
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• 2007

This paper describes the design of a l0-bit 100 KSample/S CMOS A/D Converter for biomedical applications such as pulse oximetry, body weight scale, ECG etc. We adopted an asynchronous architecture in the 10-b DAC design and hence reduces the number of switches by 11 and resistors by 64 compared with the conventional l0-b DAC. We also reduced the power consumption compare with the conventional architecture by 0.4mW. Output offset cancellation technique is applied to the design of comparator. The total power consumption of designed circuit is 190uW at the supply voltage of 1.8V with the 0.18um general CMOS technology.

• Progress in Superconductivity and Cryogenics
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• v.4 no.1
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• pp.8-12
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• 2002

Since the high performance analog-to-digital converter can be built with Rapid Single Flux Quantum (RSFQ) logic circuits the development of superconductive analog-to-digital converter has attracted a lot of interests as one of the most prospective area of the application of Josephson Junction technology. One of the main advantages in using Rapid Sng1e Flux Quantum logic in the analog-to-digital converter is the low voltage output from the Josephson junction switching, and hence the high resolution. To design an analog-digital converter, first we have used XIC tool to compose a circuit schematic, and then studied the operational principle of the circuit with WRSPICE tool. Through this process, we obtained the proper circuit diagram of an 1-bit analog-digital converter circuit. The optimized circuit was laid out as a mask drawing. Inductance values of the circuit layout were calculated with L-meter.

• The Transactions of the Korean Institute of Power Electronics
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• v.18 no.4
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• pp.403-411
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• 2013

This paper proposes an isolated bidirectional three-phase push-pull dc-dc converter for high power application such as eco-friendly vehicles, renewable energy systems, energy storage systems, and solid-state transformers. The proposed converter achieves ZVS turn-on of all switches and volume of passive components is small by an effect of three-phase interleaving. The proposed converter has identical switching pattern for both boost and buck mode, and therefore can provide seamless characteristic at the mode transition. A 3kW prototype of the proposed converter has been built and tested to verify the validity of the proposed operation.