A Design of 10-bit 100Ks/S Successive Approximation A/D Converter for Biomedical Applications

의료 기기용 10bit, 100Ks/S Successive Approximation A/D Converter 설계

This paper describes the design of a l0-bit 100 KSample/S CMOS A/D Converter for biomedical applications such as pulse oximetry, body weight scale, ECG etc. We adopted an asynchronous architecture in the 10-b DAC design and hence reduces the number of switches by 11 and resistors by 64 compared with the conventional l0-b DAC. We also reduced the power consumption compare with the conventional architecture by 0.4mW. Output offset cancellation technique is applied to the design of comparator. The total power consumption of designed circuit is 190uW at the supply voltage of 1.8V with the 0.18um general CMOS technology.