• 제목/요약/키워드: Is-Spice

검색결과 478건 처리시간 0.022초

Association of curry consumption with blood lipids and glucose levels

  • Kwon, Youngjoo
    • Nutrition Research and Practice
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    • 제10권2호
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    • pp.212-220
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    • 2016
  • BACKGROUND/OBJECTIVES: Curcumin, an active ingredient in turmeric, is highly consumed in South Asia. However, curry that contains turmeric as its main spice might be the major source of curcumin in most other countries. Although curcumin consumption is not as high in these countries as South Asia, the regular consumption of curcumin may provide a significant health-beneficial effect. This study evaluated whether the moderate consumption of curry can affect blood glucose and lipid levels that become dysregulated with age. SUBJECTS/METHODS: This study used data obtained from the Korea National Health and Nutrition Examination Survey, conducted from 2012 to 2013, to assess curry consumption frequency as well as blood glucose and blood lipid levels. The levels of blood glucose and lipids were subdivided by age, sex, and body mass index, and compared according to the curry consumption level. The estimates in each subgroup were further adjusted for potential confounding factors, including the diagnosis of diseases, physical activity, and smoking. RESULTS: After adjusting for the above confounding factors, the blood glucose and triglyceride levels were significantly lower in the moderate curry consumption group compared to the low curry consumption group, both in older (> 45) male and younger (30 to 44) female overweight individuals who have high blood glucose and triglyceride levels. CONCLUSIONS: These results suggest that curcumin consumption, in an ordinary diet, can have health-beneficial effects, including being helpful in maintaining blood glucose and triglyceride levels that become dysregulated with age. The results should be further confirmed in future studies.

겨자.계피.산초.고추냉이의 항균성 효과 (Antimicrobial Effect of Mustard, Cinnamon, Japanese Pepper and Horseradish)

  • 양지영;한종흔;강현록;황미경;이재우
    • 한국식품위생안전성학회지
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    • 제16권1호
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    • pp.37-40
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    • 2001
  • 였고 6일 후에는 5개 모든 시료에서 곰팡이가 발생하였다. 겨자를 개는 물의 온도는 겨자의 항균성에 아무 영향을 주지 않았다. 계피와 산초의 경우 4일째부터 곰팡이가 발생하기 시작하였고, 고추냉이의 경우에는 6일째 곰팡이가 발생하였으며 겨자의 경우에는 8일이 지나도 곰팡이가 발생하지 않았다. 물에 의한 추출물 중 겨자와 고추냉이의 추출물이 항균력이 강하였고, 산초는 그보다 낮은 항균력을 나타내었다. 그러나 계피 추출물은 항균력의 거의 없었다. 에탄올에 의한 추출물 중 계피에서 추출한 것만 항균력이 조금 나타났고, 나머지의 경우에는 항균력이 거의 없었다.

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Low Latency Synchronization Scheme Using Prediction and Avoidance of Synchronization Failure in Heterochronous Clock Domains

  • Song, Sung-Gun;Park, Seong-Mo;Lee, Jeong-Gun;Oh, Myeong-Hoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • 제15권2호
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    • pp.208-222
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    • 2015
  • For the performance-efficient integration of IPs on an SoC utilizing heterochronous multi-clock domains, we propose a synchronization scheme that causes low latency overhead when data are crossing clock boundaries. The proposed synchronization scheme is composed of a clock predictor and a synchronizer. The clock predictor of a sender clock domain produces a predicted clock that is used in a receiver clock domain to detect possible synchronization failures in advance. When the possible synchronization failures are detected, a synchronizer at the receiver delays data-capture times to avoid the possible synchronization failures. From the simulation of the proposed scheme through SPICE modeling using a Chartered $0.18{\mu}m$ CMOS process, we verified the functionalities and timing behavior of the clock predictor and the synchronizer. The simulation results show that the clock predictor produces a predicted clock before a synchronization failure, and the synchronizer samples data correctly using the predicted clock.

데이터 배선 용량 최소화를 위한 비정질 실리콘 박막 트렌지스터 배열의 최적화 설계와 구현 (Optimal Design of a-Si TFT Array for Minimization of Data-line Capacitance and Its Implementation)

  • 김창원;윤정기;김선용;김종효
    • 대한의용생체공학회:의공학회지
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    • 제29권5호
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    • pp.392-399
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    • 2008
  • Thin-film transistor (TFT) arrays for an x-ray detector require quite different design concept from that of the conventional active-matrix liquid crystal devices (AM-LCDs). In this paper anew design of TFT array which uses only SiNx for passivation layer is described to meet the detector performance and the product availability simultaneously. For the purpose of optimizing the design parameters of the TFT array, a Spice simulation was performed. As a result, some parameters, such as the TFT width, the data line capacitance, and the storage capacitance, were able to be fixed. The other parameters were decided within a permissible range of the TFT process especially the photolithography process and the wet etch process. Then we adapted the TFT array which had been produced by the proposed design to our prototype model (FDXD-1417 and evaluated it clinically by comparing with a commercial model (EPEX, Hologic, Beford, USA). The results say that our prototype model is slightly better than EPEX system in chest PA images. So we can prove the technical usefulness and the commercial values of the proposed TFT design.

직류 전동기의 저손실 구동을 위한 일정 주파수 제어형 영전압 스위칭 변환기의 구현 (Implement of Constant-Frequency-Controled Zero-Voltage-Switching Converter-fed DC Motor Drive for Low Power Loss)

  • 고문주;박진홍;한완옥;이성백
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 1998년도 하계학술대회 논문집 F
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    • pp.2148-2150
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    • 1998
  • This paper proposes a constant frequency controlled zero voltage switching method that can reduce switching losses caused by emf on inductance in DC motor. The zero voltage switching method is used more than a zero current switching method because of reducing switching losses by capacitance of depletion region of MOSFET. To simplify the controller circuit, we propose constant frequency controlled zero voltage switching method in the paper. The control method is more stable than a variable frequency control method because it can optimize bandwidth of a closed-loop and reactances. Therefore, we construct a constant frequency controlled zero voltage switching converter and improve zero switching losses in high switching frequency. In the process, we can control low-losses in full range on variable voltage and load. We simulate the proposed converter with P-SPICE and compare results obtained through the experiment.

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Modeling and performance evaluation of a piezoelectric energy harvester with segmented electrodes

  • Wang, Hongyan;Tang, Lihua;Shan, Xiaobiao;Xie, Tao;Yang, Yaowen
    • Smart Structures and Systems
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    • 제14권2호
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    • pp.247-266
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    • 2014
  • Conventional cantilevered piezoelectric energy harvesters (PEHs) are usually fabricated with continuous electrode configuration (CEC), which suffers from the electrical cancellation at higher vibration modes. Though previous research pointed out that the segmented electrode configuration (SEC) can address this issue, a comprehensive evaluation of the PEH with SEC has yet been reported. With the consideration of delivering power to a common load, the AC outputs from all segmented electrode pairs should be rectified to DC outputs separately. In such case, theoretical formulation for power estimation becomes challenging. This paper proposes a method based on equivalent circuit model (ECM) and circuit simulation to evaluate the performance of the PEH with SEC. First, the parameters of the multi-mode ECM are identified from theoretical analysis. The ECM is then established in SPICE software and validated by the theoretical model and finite element method (FEM) with resistive loads. Subsequently, the optimal performances with SEC and CEC are compared considering the practical DC interface circuit. A comprehensive evaluation of the advantageous performance with SEC is provided for the first time. The results demonstrate the feasibility of using SEC as a simple and effective means to improve the performance of a cantilevered PEH at a higher mode.

이중 샘플링 기반의 넓은 동작 범위 CMOS 이미지 센서의 동작 및 시뮬레이션을 통한 특성 분석 (Operation of a wide dynamic range CMOS image sensor based on dual sampling mechanism and its SPICE simulation)

  • 공재성;조성현;이수연;최경화;서상호;신장규
    • 센서학회지
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    • 제19권4호
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    • pp.285-290
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    • 2010
  • In this paper, a dynamic range(DR) extension technique based on a 3-transistor active pixel sensor(APS) and dual image sampling is proposed. The feature of the proposed APS is that the APS uses two or more photodiodes with different sensitivities, such as a high-sensitivity photodiode and a low-sensitivity photodiode. Compared with previously proposed wide DR(WDR) APS, the proposed approach has several advantages, such as no-external equipments or signal processing, no-additional time-requirement for additional charge accumulation, simple operation and adjustable DR extension by controlling parasitic capacitance and sensitivity of two photodiodes. Approximately 16 dB of DR extension was evaluated from the simulation for the situation of 10 times of sensitivity difference and the same size of parasitic capacitance between those two photodiodes.

스마트기기용 강압형 DC-DC 변환기 특성해석 (Analysis of a Buck DC-DC Converter for Smart Electronic Applications)

  • 강보경;나재훈;송한정
    • 한국산업융합학회 논문집
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    • 제22권3호
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    • pp.373-379
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    • 2019
  • Nowadays, the IoT portable electronic devices have become more useful and diverse, so they require various supply voltage levels to operate. This paper presents a DC-DC buck converter with pulse width modulation (PWM) for portable electronic devices. The proposed step-down DC-DC converter consists of passive elements such as capacitors, inductors, and resistors and an integrated chip (IC) for signal control to reduce power consumption and improves ripple voltage with the resolution. The proposed DC-DC converter is simulated and analyzed in PSPICE circuit design platform, and implemented on the prototype PCB board with a Texas Instruments LM5165 IC. The proposed buck converter is showed 92.6% of peak efficiency including a load current range of 4-10 mA, 3.29 mV of the voltage ripple at 5 V output voltage for the supply voltage 12 V. Measured and Simulated power efficiency are made good agreement with each other.

Y2K 패션 스타일을 적용한 패션 인형 의상 디자인 개발 연구 (A Study on the Development of Fashion Doll Costume Design Using Y2K Fashion Style)

  • 부예범;김차현
    • 패션비즈니스
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    • 제28권1호
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    • pp.51-67
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    • 2024
  • Recently, as the "Kidult" culture has become the culture of life, the vintage fashion doll market is rapidly emerging. This change, coupled with a tendency to cherish childhood memories among adults, shows a phenomenon that vintage dolls are gaining popularity. This study explored the possibility of creative fashion doll clothing design, aiming to satisfy consumers' more diverse and unique emotional needs and provide new perspectives and inspiration to the doll fashion industry and the fashion doll industry. Therefore, this study attempted to propose a fashion doll costume design using the Y2K fashion style that is currently popular. Based on publications and prior research considerations, the Y2K fashion style could be categorized into four main styles: 'Future Technology', 'The Matrix', 'Millennium Spice Girl', and 'Harajuku'. Based on characteristics of these four styles, this study designed and produced eight stylish doll costumes incorporating the Y2K style under themes of 'Ex Machina', 'Digital Warrior', 'Rebelious Sugar', and 'Harajuku Dopamine'. This can inspire fashion doll costume design and production based on trendy styles. This study can be a useful foundation for presenting more diverse directions for fashion doll costume design.

디스플레이 응용을 위한 능동 제어형 전계 에미터 어레이의 회로 모델링 및 시뮬레이션 (Circuit Modeling and Simulation of Active Controlled Field Emitter Array for Display Application)

  • 이윤경;송윤호;유형준
    • 대한전자공학회논문지SD
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    • 제38권2호
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    • pp.114-121
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    • 2001
  • 능동제어형 전계방출 디스플레이의 전자공급원으로서 능동제어형 전계 에미터 어레이의 회로모델이 제안되었다. 능동제어형 전계 에미터 어레이는 전계방출을 안정화시키고 저전력구동을 위한 수소화 된 비정질 실리콘 박막 트랜지스터와 Spindt형 Mo 전계 에미터 어레이로 구성되었고 같은 유리기판 위에 제작되었다. 비정질 박막 트랜지스터와 Spindt형 Mo 전계 에미터 어레이의 전기적 특성으로부터 추출된 기본 모델 변수는 제안된 능동제어형 전계 에미터 어레이 회로모델에 입력되었고 SPICE 회로 시뮬레이터를 사용하여 특성을 분석하였다. 제작된 소자의 측정값과 DC 시뮬레이션 결과를 비교한 결과 두 값이 상당히 일치함으로써 등가회로 모델의 정확성을 확인하였다. 또한 제작된 소자의 transient 시뮬레이션 결과 전계 에미터 어레이의 게이트 커패시턴스와 TFT의 구동능력이 반응시간에 가장 크게 영향을 끼치고 있음을 확인하였다. 제작된 능동제어형 전계방출 에미터 어레이는 pulse width modulation으로 구동하는 경우 15㎲의 반응시간을 얻었고 이 값으로는 4bit/color의 계조(gray scale)표현이 가능하였다.

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