• Title/Summary/Keyword: Intermodulation Distortion

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A Design of High Power Amplifier Predistortor using Carrier Complex Power Series Analysis (Carrier Complex Power Series 해석을 통한 대전력 증폭기용 전치 왜곡기 설계)

  • 윤상영;정용채
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.12 no.5
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    • pp.686-693
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    • 2001
  • In this paper, a new carrier complex power series which represents nonlinear transfer function of high power amplifier is derived. Using this transfer function, the nonlinear transfer function of predistortive circuit for linearizing the distortion effect of a HPA(High Power Amplifier) is derived and fabricated. A measured gain and $P_{1dB}$ of the fabricated HPA in IMT-2000 basestation transmitting band are 34.06 dB and 35.4 dBm. The predistortive circuit using inverse carrier complex power series is fabricated and operated with HPA. The predistortive HPA improves C/I(Carrier to Intermodulation) ratio of HPA by 17.01 dB(@Pout=25.43 dBm/tone) with 2-tone at 2.1375 GHz and 2.1425 GHz.

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A Study on the Improvement of the Performance of Power Amplifiers by Deflected Ground Structure

  • Lim, Jong-Sik;Lee, Young-Taek;Han, Jae-Hee;Nam, Sang-wook;Park, Jun-Seok;Ahn, Dal;Kim, Byung-Sung
    • Journal of electromagnetic engineering and science
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    • v.1 no.2
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    • pp.146-155
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    • 2001
  • This paper describes the improvement in performance of power amplifiers by Defected Ground Structure (DGS) for several operating classes. Due to its excellent capability of harmonic rejection, DGS plays a threat role in improving the main performance of power amplifiers such as output power, power added efficiency, harmonic rejection, and intermodulation distortion (IMD3). In order to verify the improvement in performance of power amplifiers by DGS, measured data for a 30 Watts power amplifier with and without DGS attached under several operating classes are illustrated and compared. The principle of the performance improvement is described with simple Volterra nonlinear transfer functions. Also, the measured performance far two cases, i.e. with and without DGS, and the quantities of improvement fur the various operating classes are compared and discussed.

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Design and Fabrication of wideband low-noise amplification stage for COMINT (통신정보용 광대역 저잡음 증폭단 설계 및 구현)

  • Go, Min-Ho
    • The Journal of the Korea institute of electronic communication sciences
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    • v.7 no.2
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    • pp.221-226
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    • 2012
  • In this paper, wideband two-stage amplification stage was designed, fabricated and evaluated. The proposed amplification stage with a novel gain control method have a high gain, low noise and high linearity performance. It is consisted of common emitter amplifier as the first stage, cascode gain control amplifier as second stage and power detector which sense the received signal strength. The proposed amplification stage shows a total gain of 29 dB~37 dB, noise fiugre of 1.5 dB at operating band and high linearity performance as the IMD (third intermodulation distortion) level is below the noise level of the measurement equipment at the control voltage 2.0 V generated from power detector under the strong electric field condition.

Design of Next Generation Amplifiers Using Nanowire FETs

  • Hamedi-Hagh, Sotoudeh;Oh, Soo-Seok;Bindal, Ahmet;Park, Dae-Hee
    • Journal of Electrical Engineering and Technology
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    • v.3 no.4
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    • pp.566-570
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    • 2008
  • Vertical nanowire SGFETs(Surrounding Gate Field Effect Transistors) provide full gate control over the channel to eliminate short channel effects. This paper presents design and characterization of a differential pair amplifier using NMOS and PMOS SGFETs with a 10nm channel length and a 2nm channel radius. The amplifier dissipates $5{\mu}W$ power and provides 5THz bandwidth with a voltage gain of 16, a linear output voltage swing of 0.5V, and a distortion better than 3% from a 1.8V power supply and a 20aF capacitive load. The 2nd and 3rd order harmonic distortions of the amplifier are -40dBm and -52dBm, respectively, and the 3rd order intermodulation is -24dBm for a two-tone input signal with 10mV amplitude and 10GHz frequency spacing. All these parameters indicate that vertical nanowire surrounding gate transistors are promising candidates for the next generation high speed analog and VLSI technologies.

Design of Predistortion Linearizer using Common-Gate MESFET (공통 게이트 MESFET를 이용한 전치왜곡 선형화기 설계)

  • 주성남;박청룡;최조천;최충현;김갑기
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2003.10a
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    • pp.53-56
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    • 2003
  • A linear power amplifier is particularly emphasized on the CDMA system using a linear modulation scheme, because IMD which cause adjacent channel interference and co channel Interference is mostly generated in a nonlinear power amplifier. In this paper, a new type of linearization technique proposed. It is presented that balanced MESFET predistortion linearizer added. Experimental result are present for Korea PCS frequency band. The implemented linearizer is applied to a 30dBm class. A power amplifier for simulation performance. Two-tone signals at 1850 MHz and 1851.23 MHz are injected into the main power amplifier. The main power amplifier with a 12.1dB gain and a P1dB of 30 dBm(two-tone) was utlized. The reduction of IMD is around 22dB.

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A Highly Efficiency, Highly linearity Class-F Power Amplifier Using CMRC Structure (CMRC(Compact Microwave Resonance Circuit) 구조를 적용한 고효율, 고선형성 Class-F 전력증폭기)

  • Lee, Chong-Min;Seo, Chul-Hun
    • Journal of the Institute of Electronics Engineers of Korea TC
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    • v.44 no.7 s.361
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    • pp.12-16
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    • 2007
  • In this paper, The 3rd-IMD of class-F power amplifier is improved using CMRC structure in order to remove the parasitic End harmonic at the output load of class-F power amplifier. The total size is very small more than class-F power amplifier using PBG. (Photonicband Gap) structure during improved 3rd-IMD characteristic performance.

Linearization of CMOS Drive Amplifier with IMD Canceller (IMD 상쇄기를 적용한 CMOS 구동 증폭기 선형화 방법)

  • Kim, Do-Gyun;Hong, Nam-Pyo;Moon, Yon-Tae;Choi, Young-Wan
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.58 no.5
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    • pp.999-1003
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    • 2009
  • We have designed and fabricated a linear drive amplifier with a novel intermodulation distortion(IMD) canceller using $0.18{\mu}m$ CMOS process. The drive amplifier with IMD canceller is composed of a cascode main amplifier and an additional common-source IMD canceller. Since the IMD canceller generates IM3($3^{rd}$-order imtermodulation) signal with $180^{\circ}$ phase difference against the IM3 of the cascode main amplifier, the IM3 power is drastically eliminated. As of the measurement results, $OP_{1dB}$, $OIP_3$, and power-add efficiency are 5.5 dBm, 15.5 dBm, and 21%, respectively. Those are 5 dB, 6 dB, and 13.5% enhanced values compared to a conventional cascode drive amplifier. The IMD3 of the drive amplifier with IMD canceller is enhanced more than 10 dB compared to that of the conventional cascode drive amplifier for input power ranges from -22 to -14 dBm.

A study on the Design of Predistortion Linearizer using Common-Gate MESFET (공통 게이트 MESFET를 이용한 전치왜곡 선형화기 설계에 관한 연구)

  • 김갑기
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.7 no.7
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    • pp.1369-1373
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    • 2003
  • A linear power amplifier is particularly emphasized on the CDMA system using a linear modulation scheme, because IMD which cause adjacent channel interference and co channel interference is mostly generated in a nonlinear power amplifier. In this paper, a new type of linearization technique proposed. It is presented that balanced MESFET Predistortion linearizer added. Experimental result are present for Korea PCS frequency band. The implemented linearizer is applied to a 30㏈m class A power amplifier for simulation performance. Two-tone signals at 1850 MHz and 1851.23 MHz are injected into the main power amplifier. The main power amplifier with a 12.1㏈ gain and a P1㏈ of 30 ㏈m(two-tone) was utilized. The reduction of IMD is around 22㏈.

A Study on the Predistortion Linearizer Controlled by the Individual Order with Frequency Multiplier (주파수 체배기를 이용한 개별 차수 조정 전치왜곡 선형화기의 설계 및 구현)

  • 민준기;이기학;이근태;안창돈;홍의석
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.28 no.12A
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    • pp.1019-1024
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    • 2003
  • In the thesis, we propose a new type of the predistortion linearizer using frequency multiplier The linearizer utilizing the 2nd and 3th harmonic used the individual control of the 3rd and 5th order intermodulation distortion(IMD) component. This structure is composed of wilkinson power combiner for combine and isolation of output signal, 3rd order IMD product controller using doubler and 5th order IMD product controller using tripler. The proposed predistortion linearizer controlled by individual order is obtained for about -16 dBc and 18 dBc of 3rd order and 5th order IMD components, respectively, over the frequency band 870 MHz to 880 MHz at the output power of 34 dBm/tone.

Design of New Switching Structure for Time Division Duplex system (시분할 통신 시스템을 위한 새로운 구조의 스위칭회로 설계)

  • Kim, Kwi-Soo;Lim, Jong-Sik;Ahn, Dal
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.8 no.5
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    • pp.1076-1081
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    • 2007
  • In this paper, we propose a new switch structure for time division duplex(TDD) system. The existing TDD structure utilizes a circulator fur isolation characteristic between ports. However, the circulator produces intermodulation distortion signals which are undesired signal because of its nonlinear properties. The proposed circuit is composed of a modified branch-line hybrid coupler which controls the signal flow while the isolated port is open-/short- terminated. In order to prove the validity of the presented structure, the switch circuit is fabricated and measured at 2.3GHz, the center frequency of Wibro service system.

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