• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2003.10a
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• pp.389-393
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• 2003

This paper presents circuit modeling and characterization of silicon-based on-chip integrated inductors in Giga Hertz range for wireless communication products. We compare several different designs of on-chip inductors for self-resonant frequency and quality factor. The measurement data could be used as a design guide for manufacturing practical spiral inductors for wireless applications. We provide the equivalent inductor circuit parameters from the actual measurement data.

• Proceedings of the KIEE Conference
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• 2004.07c
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• pp.2105-2107
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• 2004

In this study, Spiral inductors on the $SiO_2$/Si(100) substrate were fabricated by the magnetron sputtering method. Cu thin film with the thickness of 2 ${\mu}m$ was deposited on the substrate. Also we fabricated square inductors through the wet chemical etching technique. The inductors are completely specified by the turn width and the spacing between spirals. Both the width and spacing between spirals were varied from 10 to 60 ${\mu}m$ and from 20 to 70 ${\mu}m$, respectively. Inductance and Q factor dependent on the RF frequency were investigated to analyze performance of inductor arrays. Also, We recommend that the reasonable Q-factors, spec's turns and thickness of the coil for inductors cab be set to be ideal condition.

• Journal of the Semiconductor & Display Technology
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• v.18 no.4
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• pp.18-24
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• 2019

In this paper, expandable bobbin type multiple integrated coupled-inductor applied 4-paralled switching rectifier was proposed. To design the proposed inductor easily, inductance designing formula was derived through magnetic circuit analysis of the 4-paralleled integrated coupled-inductor. Furthermore, to verify practicality of the proposed inductor, it was applied in 600W class 4-paralleled interleaved switching rectifier, and the steady-state characteristics of the proposed inductor and discrete inductors were compared. Consequently, it was showed that the proposed inductor can replace the conventional discrete inductors with alternative electrical characteristic standard, hence miniaturization of the SMPS can be achieved. From the test result, test circuit with the proposed inductor showed maximum 97.1% of power conversion efficiency and under 18W of power loss where the circuit with discrete inductors showed 96.7% and 20W respectively.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2003.07b
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• pp.861-863
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• 2003

In this work, the preparations and characteristics of capacitors and inductors for RF IC as a integrated devices are investigated. These kinds of capacitors and inductors can be applicable to the passive components utilized in voltage controlled oscillator(VCO), low noise amplifier(LAN), mixer and synthesizer for mobile telecommunication of radio frequency band(900 MHz to 2.2GHz), and in a library of monolithic microwave integrated circuit(MMIC). The results show that these inductors and capacitors array for RF IC may be applicable to the RF IC passive components for mobile telecommunication.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.5
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• pp.404-408
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• 2003

The characterization for several multi-layer embedded inductors with different structures was investigated. The optimized equivalent circuit models for several test structures were obtained from HSPICE. Building blocks are modeled using Partial element equivalent circuit method. The mean and the standard deviation of model parameters were extracted and predictive modeling was performed on different test structure. From this study, the characteristic of multi-layer inductors can be predicted.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.07a
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• pp.139-142
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• 2001

As microeletronics technology continues to progress, there is also a continuous demand on highly integration and miniaturization of systems. For example, it is desirable to package several integrated circuits together in multilayer structure, such as multichip modules, to achieve higher levels of compactness and higher performance. Passive components (i.e., capacitors, resistors, and inductors) are very important for many MCM applications. In addition, the low-temperature co-fired ceramic (LTCC) process has considerable potential for embedding passive components in a small area at a low cost. In this paper, we investigate a method of statistically modeling integrated passive devices from just a small number of test structures. A set of LTCC inductors is fabricated and their scattering parameters (5-parameters) are measured for a range of frequencies from 50MHz to 5GHz. An accurate model for each test structure is obtained by using a building block based modeling methodology and circuit parameter optimization using the HSPICE circuit simulator.

• JSTS:Journal of Semiconductor Technology and Science
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• v.2 no.4
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• pp.295-301
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• 2002

In this paper, solenoid-type 3-D passives (inductors and transformers) have been designed, fabricated, and characterized by using electroplating techniques, wire bonding techniques, multi-layer thick photoresist, and low temperature processes which are compatible with semiconductor circuitry fabrication. Two different fabrication approaches are performed to develop the solenoid-type 3-D passives and relationship of performance characteristics and geometry is also deeply investigated such as windings, cross-sectional area of core, spacing between windings, and turn ratio. Fully integrated inductor has a quality factor of 31 at 6 GHz, an inductance of 2.7 nH, and a self resonant frequency of 15.8 GHz. Bonded wire inductor has a quality factor of 120, an inductance of 20 nH, and a self resonant frequency of 8 GHz. Integrated transformers with turn ratios of 1:1 and n:l have the minimum insertion loss of about 0.6 dB and the wide bandwidth of a few GHz.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.4
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• pp.344-348
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• 2002

As microelectronics technology continues to progress, there is also a continuous demand on highly integration and miniaturization of systems. For example, it is desirable to package several integrated circuits together in multilayer structure, such as multichip modules, to achieve higher levels of compactness and higher performance. Passive components (i.e., capacitors, resistors, and inductors) are very important fort many MCM applications. In addition, the low-temperature co-fired ceramic (LTCC) process has considerable potential for embedding passive components in a small area at a low cost. In this paper, we investigate a method of statistically modeling integrated passive devices from just a small number of test structures. A set of LTCC inductors is fabricated and their scattering parameters (s-parameters) are measured for a range of frequencies from 50MHz to 5GHz. An accurate model for each test structure is obtained by using a building block based modeling methodology and circuit parameter optimization using the HSPICE circuit simulator.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.07b
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• pp.912-915
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• 2004

Inductors material utilized in the downsizing passive devices and Rf components requires the physical and electrical properties at given area such as inductors thickness reduction, inductance and q-factor increase, low leakage current and thermal stability. In this study, Spiral inductors on the $SiO_2/Si$(100) substrate were fabricated by the magnetron sputtering method. Cu thin film with the thickness of $2{\mu}m$ was deposited on the substrate. Also we fabricated square inductors through the wet chemical etching technique. The inductors are completely specified by the turn width and the spacing between spirals. Both the width and spacing between spirals were varied from 10 to $60{\mu}m$ and from 20 to $70{\mu}m$, respectively. Inductance and Q factor dependent on the RF frequency were investigated to analyze performance of inductor arrays

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.37 no.10
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• pp.17-24
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• 2000

An area efficient and symmetric dual-level spiral inductor structure is proposed and evaluated in comparison with the conventional single-level spiral inductors. Contrary to the dual-level inductor mutual coupling coefficient of the upper-and lower-level inductors of the dual-level inductor increases with the increases in the number of turns. Because of this, for the same silicon area, the inductances of the dual-level incuctors are 2.5-4 times higher than that of the single-level inductor. Furthermore, the dual-level showed better quality factor that the single-level inductors for the same inductance. It is the intention of this paper to demonstrate that the dual-level can be more useful for the RF integrated circuits than the conventional single-level spiral inductors form the aspects of area efficiency and quality factor. The proposed dual-level inductors are designed and confirmed to be perfectly symmetric, and can also be used as a high-frequency choke.