• 제목/요약/키워드: Integrated inductors

검색결과 53건 처리시간 0.024초

Silicon-Based Integrated Inductors for Wireless Applications

  • Kim, Bruce C.
    • 한국정보통신학회:학술대회논문집
    • /
    • 한국해양정보통신학회 2003년도 추계종합학술대회
    • /
    • pp.389-393
    • /
    • 2003
  • This paper presents circuit modeling and characterization of silicon-based on-chip integrated inductors in Giga Hertz range for wireless communication products. We compare several different designs of on-chip inductors for self-resonant frequency and quality factor. The measurement data could be used as a design guide for manufacturing practical spiral inductors for wireless applications. We provide the equivalent inductor circuit parameters from the actual measurement data.

  • PDF

박막 인덕터 어레이의 Q-Factor 특성에 관한 연구 (A Study on the Q-Factor Characteristics of Integrated Inductors Array)

  • 김인성;민복기;송재성
    • 대한전기학회:학술대회논문집
    • /
    • 대한전기학회 2004년도 하계학술대회 논문집 C
    • /
    • pp.2105-2107
    • /
    • 2004
  • In this study, Spiral inductors on the $SiO_2$/Si(100) substrate were fabricated by the magnetron sputtering method. Cu thin film with the thickness of 2 ${\mu}m$ was deposited on the substrate. Also we fabricated square inductors through the wet chemical etching technique. The inductors are completely specified by the turn width and the spacing between spirals. Both the width and spacing between spirals were varied from 10 to 60 ${\mu}m$ and from 20 to 70 ${\mu}m$, respectively. Inductance and Q factor dependent on the RF frequency were investigated to analyze performance of inductor arrays. Also, We recommend that the reasonable Q-factors, spec's turns and thickness of the coil for inductors cab be set to be ideal condition.

  • PDF

보빈 적층 방식의 다중 공유결합 인덕터를 이용한 4병렬 스위칭 정류기에 관한 연구 (A Study on the Expandable Bobbin Type Multiple Integrated Coupled-Inductor Applied 4-Pralleled Switching Rectifier)

  • 유정상;안태영
    • 반도체디스플레이기술학회지
    • /
    • 제18권4호
    • /
    • pp.18-24
    • /
    • 2019
  • In this paper, expandable bobbin type multiple integrated coupled-inductor applied 4-paralled switching rectifier was proposed. To design the proposed inductor easily, inductance designing formula was derived through magnetic circuit analysis of the 4-paralleled integrated coupled-inductor. Furthermore, to verify practicality of the proposed inductor, it was applied in 600W class 4-paralleled interleaved switching rectifier, and the steady-state characteristics of the proposed inductor and discrete inductors were compared. Consequently, it was showed that the proposed inductor can replace the conventional discrete inductors with alternative electrical characteristic standard, hence miniaturization of the SMPS can be achieved. From the test result, test circuit with the proposed inductor showed maximum 97.1% of power conversion efficiency and under 18W of power loss where the circuit with discrete inductors showed 96.7% and 20W respectively.

L-C Library 박막 소자의 제조와 특성에 관한 연구 (The study on Characteristics and Fabrication of L-C Library components)

  • 김인성;민복기;송재성
    • 한국전기전자재료학회:학술대회논문집
    • /
    • 한국전기전자재료학회 2003년도 하계학술대회 논문집 Vol.4 No.2
    • /
    • pp.861-863
    • /
    • 2003
  • In this work, the preparations and characteristics of capacitors and inductors for RF IC as a integrated devices are investigated. These kinds of capacitors and inductors can be applicable to the passive components utilized in voltage controlled oscillator(VCO), low noise amplifier(LAN), mixer and synthesizer for mobile telecommunication of radio frequency band(900 MHz to 2.2GHz), and in a library of monolithic microwave integrated circuit(MMIC). The results show that these inductors and capacitors array for RF IC may be applicable to the RF IC passive components for mobile telecommunication.

  • PDF

부분등가회로모델을 이용한 매립형 인덕터의 특성 연구 (Characterization of Embedded Inductors using Partial Element Equivalent Circuit Models)

  • 신동욱;오창훈;이규복;김종규;윤일구
    • 한국전기전자재료학회논문지
    • /
    • 제16권5호
    • /
    • pp.404-408
    • /
    • 2003
  • The characterization for several multi-layer embedded inductors with different structures was investigated. The optimized equivalent circuit models for several test structures were obtained from HSPICE. Building blocks are modeled using Partial element equivalent circuit method. The mean and the standard deviation of model parameters were extracted and predictive modeling was performed on different test structure. From this study, the characteristic of multi-layer inductors can be predicted.

고속 3차원 매립 인덕터에 대한 모델링 (Modeling of High-speed 3-Disional Embedded Inductors)

  • 이서구;최종성;윤일구
    • 한국전기전자재료학회:학술대회논문집
    • /
    • 한국전기전자재료학회 2001년도 하계학술대회 논문집
    • /
    • pp.139-142
    • /
    • 2001
  • As microeletronics technology continues to progress, there is also a continuous demand on highly integration and miniaturization of systems. For example, it is desirable to package several integrated circuits together in multilayer structure, such as multichip modules, to achieve higher levels of compactness and higher performance. Passive components (i.e., capacitors, resistors, and inductors) are very important for many MCM applications. In addition, the low-temperature co-fired ceramic (LTCC) process has considerable potential for embedding passive components in a small area at a low cost. In this paper, we investigate a method of statistically modeling integrated passive devices from just a small number of test structures. A set of LTCC inductors is fabricated and their scattering parameters (5-parameters) are measured for a range of frequencies from 50MHz to 5GHz. An accurate model for each test structure is obtained by using a building block based modeling methodology and circuit parameter optimization using the HSPICE circuit simulator.

  • PDF

Solenoid Type 3-D Passives(Inductors and Trans-formers) For Advanced Mobile Telecommunication Systems

  • Park, Jae Y.;Jong U. Bu
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • 제2권4호
    • /
    • pp.295-301
    • /
    • 2002
  • In this paper, solenoid-type 3-D passives (inductors and transformers) have been designed, fabricated, and characterized by using electroplating techniques, wire bonding techniques, multi-layer thick photoresist, and low temperature processes which are compatible with semiconductor circuitry fabrication. Two different fabrication approaches are performed to develop the solenoid-type 3-D passives and relationship of performance characteristics and geometry is also deeply investigated such as windings, cross-sectional area of core, spacing between windings, and turn ratio. Fully integrated inductor has a quality factor of 31 at 6 GHz, an inductance of 2.7 nH, and a self resonant frequency of 15.8 GHz. Bonded wire inductor has a quality factor of 120, an inductance of 20 nH, and a self resonant frequency of 8 GHz. Integrated transformers with turn ratios of 1:1 and n:l have the minimum insertion loss of about 0.6 dB and the wide bandwidth of a few GHz.

저온 동시소성 공정으로 제작된 3차원 매립 인덕터 모델링 (Modeling of 3-D Embedded Inductors Fabricated in LTCC Process)

  • 이서구;최종성;윤일구
    • 한국전기전자재료학회논문지
    • /
    • 제15권4호
    • /
    • pp.344-348
    • /
    • 2002
  • As microelectronics technology continues to progress, there is also a continuous demand on highly integration and miniaturization of systems. For example, it is desirable to package several integrated circuits together in multilayer structure, such as multichip modules, to achieve higher levels of compactness and higher performance. Passive components (i.e., capacitors, resistors, and inductors) are very important fort many MCM applications. In addition, the low-temperature co-fired ceramic (LTCC) process has considerable potential for embedding passive components in a small area at a low cost. In this paper, we investigate a method of statistically modeling integrated passive devices from just a small number of test structures. A set of LTCC inductors is fabricated and their scattering parameters (s-parameters) are measured for a range of frequencies from 50MHz to 5GHz. An accurate model for each test structure is obtained by using a building block based modeling methodology and circuit parameter optimization using the HSPICE circuit simulator.

집적화 인덕터 어레이의 고주파 특성에 관한 연구 (A Study on the RF Frequency of Integrated Inductors Array)

  • 김인성;민복기;송재성
    • 한국전기전자재료학회:학술대회논문집
    • /
    • 한국전기전자재료학회 2004년도 하계학술대회 논문집 Vol.5 No.2
    • /
    • pp.912-915
    • /
    • 2004
  • Inductors material utilized in the downsizing passive devices and Rf components requires the physical and electrical properties at given area such as inductors thickness reduction, inductance and q-factor increase, low leakage current and thermal stability. In this study, Spiral inductors on the $SiO_2/Si$(100) substrate were fabricated by the magnetron sputtering method. Cu thin film with the thickness of $2{\mu}m$ was deposited on the substrate. Also we fabricated square inductors through the wet chemical etching technique. The inductors are completely specified by the turn width and the spacing between spirals. Both the width and spacing between spirals were varied from 10 to $60{\mu}m$ and from 20 to $70{\mu}m$, respectively. Inductance and Q factor dependent on the RF frequency were investigated to analyze performance of inductor arrays

  • PDF

RF집적회로용 이중층 나선형 대칭구조 인덕터의 설계 및 비교 분석 (Design, Analysis, and Comparison of Symmetric Dual-level Spiral Inductors for RF Integrated Circuits)

  • 임국주;신소봉;이상국
    • 대한전자공학회논문지SD
    • /
    • 제37권10호
    • /
    • pp.17-24
    • /
    • 2000
  • 면적 효율이 높은 대칭 구조를 갖는 이중층 나선형 인덕터를 제시하였으며 그 특성을 일반적인 단일층 나선형 인덕터와 비교하여 분석하였다. 일반적인 예측과 달리 이중층 인덕터의 상하층 유도 계수가 인덕터의 권선수와 함께 증가하는 것을 확인하였고 이로 인하여 동일한 면적에 대하여 이중층 인덕터은 권선수에 따라 단일층에 비해 2.5-4배 정도 높은 인덕턴스값을 나타내었다. 또한 같은 인덕턴스 값에 대하여 이중층 구조로 단일층 구조 보다 높은 충실도를 가짐을 확인하였다. 본 논문에서는 이중층 나선형 인덕터가 단일층 나선형 인덕터보다 면적 효율과 충실도 측면에서 우수하여 RF집적회로에 활용되기에 적절한 보다 구조임을 제시하고자 한다. 제시된 이중층 나선형 인덕터는 완벽한 대칭 구조를 갖도록 설계되었으며 측정 결과에서 이와 같은 특성을 확인할 수 있었으며, 고주파용 초크로서 활용가능성을 확인하였다.

  • PDF