• Nuclear Engineering and Technology
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• v.41 no.5
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• pp.617-648
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• 2009

Under the government supported long-term nuclear R&D program, the severe accident research program at KAERI is directed to investigate unresolved severe accident issues such as core debris coolability, steam explosions, and hydrogen combustion both experimentally and numerically. Extensive studies have been performed to evaluate the in-vessel retention of core debris through external reactor vessel cooling concept for APR1400 as a severe accident management strategy. Additionally, an improvement of the insulator design outside the vessel was investigated. To address steam explosions, a series of experiments using a prototypic material was performed in the TROI facility. Major parameters such as material composition and void fraction as well as the relevant physics affecting the energetics of steam explosions were investigated. For hydrogen control in Korean nuclear power plants, evaluation of the hydrogen concentration and the possibility of deflagration-to-detonation transition occurrence in the containment using three-dimensional analysis code, GASFLOW, were performed. Finally, the integrated severe accident analysis code, MIDAS, has been developed for domestication based on MELCOR. The data transfer scheme using pointers was restructured with the modules and the derived-type direct variables using FORTRAN90. New models were implemented to extend the capability of MIDAS.

• Proceedings of the IEEK Conference
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• 2004.06b
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• pp.355-358
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• 2004

In this work, N-LDMOSFET(Lateral Double diffused MOSFET) was designed and fabricated on SOI(Silicon-On-Insulator) substrate, for such applications as motor controllers and high voltage switches, fuel injection controller systems in automobile and SSR(Solid State Rexay)etc. The LDMOSFET was designed to overcome the floating body effects that appear in the conventional thick SOI MOS structure by adding p+ region in source region. Also, RESURF(Reduced SURface Field) structure was proposed in this work in order to reduce a large on-resistance of LDMOSFET when operated keeping high break down voltage. Breakdown voltage was 268v in off-state ($V_{GS}$=OV) at room temperature in $22{\mu}m$ drift length LDMOSFET. When 5V of $V_{GS}$ and 30V of $V_{DS}$ applied, the on resistance(Ron), the transcon ductance($G_m$) and the threshold voltage($V_T$) was 1.76k$\Omega$, 79.7uA/V and 1.85V respectively.

• Computers and Concrete
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• v.21 no.3
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• pp.311-319
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• 2018

This study used a volumetric method for design. The control group used waste Liquid Crystal Displayplay (LCD) glass powder to replace cement (0%, 10%, 20%, 30%), and the PZT group used Pd-Zr-Ti piezoelectric (PZT) powder to replace 5% of the fine aggregate to make cement mortar. The engineering and the mechanical and electricity properties were tested; flow, compressive strength, ultrasonic pulse velocity (UPV), water absorption and resistivity (SSD and OD electricity at 50 V and 100 V) were determined; and the correlations were determined by linear regression. The compressive strength of the control group (29.5-31.8 MPa) was higher than that of the PZT group (25.1-29 MPa) by 2.8-4.4 MPa at the curing age of 28 days. A 20% waste LCD glass powder replacement (31.8 MPa) can fill up finer pores and accelerate hydration. The control group had a higher 50 V-SSD resistivity ($1870-3244{\Omega}.cm$), and the PZT group had a lower resistivity ($1419-3013{\Omega}.cm$), meaning that the resistivity increases with the replacement of waste LCD glass powder. This is because the waste LCD glass powder contains 62% $SiO_2$, which is a low dielectric material that is an insulator. Therefore, the resistivity increases with the $SiO_2$ content.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.19 no.10
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• pp.907-911
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• 2006

In this paper, we propose a new structure that improves the on-state voltage drop and switching speed in Insulated Gate Bipolar Transistors(IGBTs), which can be widely used in high voltage semiconductors. The proposed structure is unique in that the collector area is divided by $SiO_2$, whereas the conventional IGBT has a planar P+ collector structure. The process and device simulation results show remarkably improved on-state and switching characteristics. Also, the current and electric field distribution indicate that the segmented collector structure has increased electric field near the $SiO_2$ corner, which leads to an increase of electron current. This results in a decrease of on-state resistance and voltage drop to $30%{\sim}40%$. Also, since the area of the P+ region is decreased compared to existing structures, the hole injection decreases and leads to an increase of switching speed to 30 %. In spite of some complexity in process procedures, this structure can be manufactured with remarkably improved characteristics.

• Progress in Superconductivity
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• v.11 no.1
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• pp.36-41
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• 2009

Superconducting quantum phenomena are getting attention from the field of metrology area. Following its first successful application of Josephson effect to voltage standard, piconewton force standard was suggested as a candidate for the next application of superconducting quantum effects in metrology. It is predicted that a micron-sized superconducting Nb ring in a strong magnetic field gradient generates a quantized force of the order of sub-piconewtons. In this work, we studied the design and fabrication of Nb superconducting quantum interference device (SQUID) on an ultra-thin silicon cantilever. The Nb SQUID and electrodes were structured on a silicon-on-insulator (SOI) wafer by dc magnetron sputtering and lift-off lithography. Using the resulting SOI wafer, we fabricated V-shaped and parallel-beam cantilevers, each with a $30-{\mu}m$-wide paddle; the length, width, and thickness of each cantilever arm were typically $440{\mu}m,\;4.5{\mu}m$, and $0.34{\mu}m$, respectively. However, the cantilevers underwent bending, a technical difficulty commonly encountered during the fabrication of electrical circuits on ultra-soft mechanical substrates. In order to circumvent this difficulty, we controlled the Ar pressure during Nb sputtering to minimize the intrinsic stress in the Nb film and studied the effect of residual stress on the resultant device.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.22 no.12
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• pp.1009-1013
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• 2009

In this study, we have been synthesized the dielectric layer using pure organic and organic-inorganic hybrid precursor on flexible substrate for improving of the organic thin film transistors (OTFTs) and, design and fabrication of organic thin-film transistors (OTFTs) using small-molecule organic semiconductors with pentacene as the active layer with record device performance. In this work OTFT test structures fabricated on polymerized substrates were utilized to provide a convenient substrate, gate contact, and gate insulator for the processing and characterization of organic materials and their transistors. By an adhesion development between gate metal and PI substrate, a PI film was treated using $O_2$ and $N_2$ gas. The best peel strength of PI film is 109.07 gf/mm. Also, we have studied the electric characteristics of pentacene field-effect transistors with the polymer gate-dielectrics such as cyclohexane and hybrid (cyclohexane+TEOS). The transistors with cyclohexane gate-dielectric has higher field-effect mobility, $\mu_{FET}=0.84\;cm^2/v_s$, and smaller threshold voltage, $V_T=-6.8\;V$, compared with the transistor with hybrid gate-dielectric.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.7 no.3
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• pp.298-307
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• 2006

TEE Forming process for HDPE(High Density PolyEthylen) pipe has been analyzed by using rigid plastic finite element code, DEFORM-3D. TEE of HDPE pipes is necessary to connect main pipe with branch pipe and change the flow direction of hot water. A HDPE pipe is used as a insulator to maintain the temperature of hot water A butt welding process through TEE forming for a HDPE pipe is a updated process improving the strength of welding part compared to conventional extrusion welding process. The Experiment of Hot and Cold Forming have been performed. The design parameters such as a initial hole shape have been obtained through rigid-plastic finite element analysis, which is applied to the actual manufacturing process.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.11 no.6
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• pp.428-435
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• 1998

SOI-like-bulk CMOS device is proposed, which having the advantages of SOI(Silicon On Insulator) and protects short channel effects efficiently with adding partial epitaxial process at standard CMOS process. SOI-like-bulk NMOS and PMOS with 0.25${\mu}{\textrm}{m}$ gate length have designed and optimized through analyzing the characteristics of these devices and applying again to the design of processes. The threshold voltages of the designed NMOS and PMOS are 0.3[V], -0.35[V] respectively and those have shown the stable characteristics under 1.5[V] gate and drain voltages. The leakage current of typical bulk-CMOS increase with shortening the channel length, but the proposed structures on this a study reduce the leakage current and improve the subthreshold characteristics at the same time. In addition, subthreshold swing value, S is 70.91[mV/decade] in SOI-like-bulk NMOS and 63.37[mV/ decade] SOI-like-bulk PMOS. And the characteristics of SOI-like-bulk CMOS are better than those of standard bulk CMOS. To validate the circuit application, CMOS inverter circuit has designed and transient & DC transfer characteristics are analyzed with mixed mode simulation.

• 제어로봇시스템학회:학술대회논문집
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• 2005.06a
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• pp.2063-2066
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• 2005

This paper presents an approach to detect the dielectric condition of FRP Hot Stick in EHV high voltage cable whereas shutting down the power system is not necessary. The radio frequency generating method is adopted by transmitting radio wave into the Electrodes. This instrument is small, easy to use and also inexpensive. Furthermore, the impurity level of dirt on high voltage insulator (non-ceramic type) will be analyzed by using the methods based on IEEE Std.978-1984 at 105 kV.DC. /305 mm. and OSHA Regulation 1910.269 Part J - live line tools. The frequency at 10-20 MHz is applied to FRP Hot Stick via Electrode1 and from FRP Hot Stick surface to Electrode 2. After that the results will be evaluated by testing in each condition of FRP Hot Stick, such as dry surface, hot surface, foil winding and conductor inserting. Finally, the watt loss will be examined and compared with the loss from humidity and Carbon tracking. The important components of this system are radio frequency generating unit, frequency stabilizing unit, frequency amplifier, FRP Hot Stick frequency counter, processing unit, and display unit.

• International Journal of Fuzzy Logic and Intelligent Systems
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• v.1 no.1
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• pp.87-94
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• 2001

Silicon nitride films grown by plasma-enhanced chemical vapor deposition (PECVD) are useful for a variety of applications, including anti-reflecting coatings in solar cells, passivation layers, dielectric layers in metal/insulator structures, and diffusion masks. PECVD systems are controlled by many operating variables, including RF power, pressure, gas flow rate, reactant composition, and substrate temperature. The wide variety of processing conditions, as well as the complex nature of particle dynamics within a plasma, makes tailoring SiN film properties very challenging, since it is difficult to determine the exact relationship between desired film properties and controllable deposition conditions. In this study, SiN PECVD modeling using optimized neural networks has been investigated. The deposition of SiN was characterized via a central composite experimental design, and data from this experiment was used to train and optimize feed-forward neural networks using the back-propagation algorithm. From these neural process models, the effect of deposition conditions on film properties has been studied. A recipe synthesis (optimization) procedure was then performed using the optimized neural network models to generate the necessary deposition conditions to obtain several novel film qualities including high charge density and long lifetime. This optimization procedure utilized genetic algorithms, hybrid combinations of genetic algorithm and Powells algorithm, and hybrid combinations of genetic algorithm and simplex algorithm. Recipes predicted by these techniques were verified by experiment, and the performance of each optimization method are compared. It was found that the hybrid combinations of genetic algorithm and simplex algorithm generated recipes produced films of superior quality.