• Journal of the Korea Institute of Information and Communication Engineering
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• v.6 no.4
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• pp.559-566
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• 2002

n this paper, we propose a WBI(Web Based Instruction) for individualized learning using push and pull technologies with WWW(World Wide Web). As well as push End pull technologies, the proposing system is implemented with JSP(Java Server Page) and JDBC(Java Database Connectivity) of java technologies based on the client/server envirionments for the purpose of providing practical lectures to students.

• Journal of Korean Academy of Nursing
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• v.31 no.6
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• pp.1109-1118
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• 2001

The purpose of this study was to analyze the appraising frame and the accreditation system of universities in both Korea and the United Sates, as well as developing a standard plan to appraise 4 year nursing education institutions in Korea. Research design of this study was descriptive comparative research. The results of the research can be divided into six fields, educational purposes, educational courses, students, faculty, facility .equipments and administration.finance in Korea. Then the results were further categorized into seven fields : mission and governance, faculty, students, curriculum and instruction, resources, educational effectiveness and integrity. Thus Korean appraising frames were suggested to have eight fields of standard. The fields are philosophy and purposes of educational institution, educational courses and instruction, students, faculty, facility .equipments, adminstration.finance, educational effectiveness and integrity.

• Journal of Korean Home Economics Education Association
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• v.13 no.3
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• pp.1-11
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• 2001

The purpose in this study was to investigate stages of concern of home economics teachers about the practical reasoning instruction(PRI) innovation configuration. levels of use. using Concerns Based Adoption Model(CBAM) The design of the study was descriptive. The Questionnaires of stages of concern. levels of use. and innovation configuration developed by Hall in 1987 were used. Data from HE teachers were collected through mailing. focus interview. and phone calls. Mean. percents. an frequencies were used to describe stages of concern, level of use. and innovation configuration. The results of the study were as follows: 1. The highest number of HE teacher respondents was stage 1. Information in March and july. 2 In terms of mean of PRI configuration. percentile. the HE teachers had implemented over 63% of the PRI elements and the cooperative learning elements in both March and July. However. of evaluation elements, 33% in March and 47% in July had been conducted. 3. The highest number of HE teacher respondents was level 3. Mechanical level in March. and July.

• Proceedings of the KIEE Conference
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• 2008.10c
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• pp.246-247
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• 2008

Further evolutions of technologies and needs of users will make mobile equipments improved. To make this happen, processor's good performance is essential. Hence, This paper propose a reform of Instruction Execute and Instruction Decode of contemporary ARMv7 which needs low-power and has the high performance for a faster processor. The first chapter explains why the performance of a processor has to be upgraded, the second chapter shows current technologies. The third chapter explains about the proposal and illustrates the structure. Finally, in the forth chapter, the conclusion will be made. 3-way Superscalar, that is proposed in this paper, will make designing a faster processor possible. And it will contribute for the advanced performance of mobile equipments.

• Transactions on Electrical and Electronic Materials
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• v.13 no.6
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• pp.278-282
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• 2012

Photovoltaic systems have emerged to be one of the cleanest energy systems. Therefore, many large scale solar parks and PV farms have been built to prepare for the post fossil fuel ages. However, due to their large scale, to efficiently manage and operate PV systems, they need to be visually monitored within the range of infrared ray through the Internet. To satisfy this need, the efficient implementation of a high performance video compression standard is required. This paper therefore presents an implementation of H.264 motion estimation, which is one of the most data-intensive and complicated functions in H.264. To achieve this, this work implements vector instructions in hardware and incorporates them in a generic RISC processor architecture, thus increasing the processing speed while minimizing hardware and software design efforts. Extensive simulation results show that this proposed implementation can process motion estimations up to 13 times faster.

• 한국정보교육학회:학술대회논문집
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• 2009.08a
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• pp.255-261
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• 2009

오늘날 웹은 급속도로 확산되어 교육에 있어서 필수적인 존재로 강력한 힘을 발휘하게 되었다. 사이버 교육 환경의 시대를 맞이하여 웹을 이용한 학습 활동의 비중은 점점 더 증가되었지만 대다수의 웹기반 교수 (Web-based Instruction : WBI)학습 사이트들이 비장애인 중심의 사용자 인터페이스로 설계됨에 따라 청각 장애인을 학습 공간에서 격리 시키고 학습 능력을 저하시키는 이중 장애를 발생시키고 있다. 따라서 본 논문에서는 최근 청각 장애인의 교육방법으로 대두되고 있는 이중언어-이중문화 접근법 (Bilingual Method : 2Bi 이론)을 활용하여 청각 장애인의 WBI 학습 능력을 신장시킬 수 있는 사용자 인터페이스를 설계하였다. 본 사용자 인터페이스의 특징은 다음과 같다. 첫째, 청각 장애인의 웹접근성을 고려한 인터페이스를 설계하여 청각 장애 학습자가 보다 쉽게 학습 공간에 접근하게 하였다. 둘째, 청각 장애인의 장애 정도 및 학습 성취 정도에 따라 3단계 사용자 인터페이스를 제공하여 수준별 학습이 가능하다. 셋째, 순차적 반복 학습이 가능하여 청각 장애인의 학습 능력뿐 아니라 의사소통 기능 향상에도 긍정적인 영향을 제공한다.

• Journal of Digital Convergence
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• v.2 no.1
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• pp.43-56
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• 2004

The emergence of distance learning through Information and Communication Technologies(ICT) requires a lot of abilities from learners, and these become main features to a successful learning. Accordingly, a self-regulated learning is one of the key abilities required by the learners, Hence this study is aimed to develop Web-Based Instruction(WBI) systems that support this self-regulated learning. The self-regulated learning not only provides significant positive learning effects, but also appropriates to apply on the WBI because it has learning-structure of specified instruction process and each process requires separated spaces. Therefore, in this study, a model of self-regulated learning system on the web is developed.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.1
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• pp.51-58
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• 2011

Extensible processors provide an efficient mechanism to boost the performance of the whole system without losing much flexibility. However, due to the intense demand of low cost and power consumption, customizing an embedded system has been more difficult than ever. In this paper, we present a framework for custom instruction generation considering both area constraints and resource sharing. We also present how we can speed up the process through pruning and library-based design space exploration.

• Annual Conference of KIPS
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• 2014.11a
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• pp.53-56
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• 2014

Application specific instruction-set processor (ASIP) is a suitable design choice for system designers who seek both flexibility to handle various applications in the domain together with the performance. Successful development of an ASIP, however, requires a software development kit (SDK) to be provided along with the processor. Synopsys Processor Designer is an ASIP development tool, which takes as input a set of files written in a high-level architecture description language called LISA (Language for Instruction Set Architecture), and generates SDK as well as RTL. Recently, they have added support for the generation of LLVM compiler backend, though some manual work is required. In this paper, we introduce some details in porting LLVM compiler to a custom processor architecture in Synopsys Processor Designer.

• Proceedings of the IEEK Conference
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• 1998.10a
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• pp.763-766
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• 1998

This paper describes the microarchitecture of the integer processor unit of RAPTOR which is an on-chip multiprocessor. The integer processor unit implements the 64-bit SPARC-V9 architecture and supports by hardware out-of-order instruction execution. The unit is designed to be handy so that multiple copies of the unit cn be integrated with cache memories into a single chip. The design was proceeded in a top-down manner. The hardware description and its verfication were performed using Verilog-HDL.