• Journal of the Korea Society of Computer and Information
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• v.18 no.2
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• pp.9-17
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• 2013

In this paper, we propose a new multiplication algorithm for two polynomials using primitive polynomial with all 1 of coefficient on finite fields GF($2^m$), and design the multiplier with high-speed parallel input-output module structure using the presented multiplication algorithm. The proposed multiplier is designed $m^2$ same basic cells that have a 2-input XOR gate and a 2-input AND gate. Since the basic cell have no a latch circuit, the multiplicative circuit is very simple and is short the delay time $D_A+D_X$ per cell unit. The proposed multiplier is easy to extend the circuit with large m having regularity and modularity by cell array, and is suitable to the implementation of VLSI circuit.

• Proceedings of the KIPE Conference
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• 2008.06a
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• pp.400-402
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• 2008

A new interleaved forward converter, adopting series-input parallel-output structure with a common transformer reset circuit, is proposed in this paper. Series-input structure distributes the voltage stress on switches, which makes it suitable for high input voltage application. Paralleling output stage with an interleaving technique enables the circuit handle large output current and reduces filter size. In addition, since two forward converters share one active-clamp circuit for the transformer reset, its primary structure is simplified. All these features make the proposed converter promising for high input voltage applications with high efficiency and simple structure.

• Journal of Advanced Navigation Technology
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• v.2 no.1
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• pp.34-42
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• 1998

An adaptive state and input estimator for the tracking of a target with unknown randomly switching input is developed. In modeling the unknown inputs, it is assumed that the input sequence is governed by semi-Markov process. By incorporating the semi-Markov probability concepts into the Bayesian estimation theory, an effective adaptive state and input estimator which consists of parallel Kalman-type filters is obtained. Computer simulation results reveal that the proposed adaptive estimator have improved tracking performance in spite of the unknown randomly switching input.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.4 no.5
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• pp.1037-1050
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• 2000

A goal of a BISDN network is to provided integrated transport for a wide range of applications such as teleconferencing, Video On Demand etc. There require multipoint communications in addition to conventional point-to-point connections. Therefore multicast capabilities are very essential in multimedia communications. In this paper, we propose a new multicast cell scheduling method on the Parallel Multicast Packet Switch with Ring network: PMRN which are based on separated HOL. In this method, we place two different HOLs, one for unicast cells and the other for multicast cells. Then using non-FIFO scheduling, we can schedule both unicast cells and multicast cells which are available at the time in the input buffer. The simulation result shows that this method reduces the delay in the input buffer and increases the efficiency of both point-to-point network and ring network and finally enhances the bandwidth of the overall packet switch. A goal of a BISDN network is to provided integrated transport for a wide range of applications such as teleconferencing, Video On Demand etc. There require multipoint communications in addition to conventional point-to-point connections. Therefore multicast capabilities are very essential in multimedia communications. In this paper, we propose a new multicast cell scheduling method on the Parallel Multicast Packet Switch with Ring network: PMRN which are based on separated HOL. In this method, we place two different HOLs, one for unicast cells and the other for multicast cells. Then using non-FIFO scheduling, we can schedule both unicast cells and multicast cells which are available at the time in the input buffer. The simulation result shows that this method reduces the delay in the input buffer and increases the efficiency of both point-to-point network and ring network and finally enhances the bandwidth of the overall packet switch.

• KIISE Transactions on Computing Practices
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• v.22 no.7
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• pp.303-309
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• 2016

Recently, an increasing number of embedded processors such as ARM Mali begin to support GPGPU programming frameworks, such as OpenCL. Thus, GPGPU technologies that have been used in PC and server environments are beginning to be applied to the embedded systems. However, many embedded systems have different architectural characteristics compare to traditional PCs and low-power consumption and real-time performance are also important performance metrics in these systems. In this paper, we implement a parallel AES cryptographic algorithm for a modern embedded GPU using OpenCL, a standard parallel computing framework, and compare performance against various baselines. Experimental results show that the parallel GPU AES implementation can reduce the response time by about 1/150 and the energy consumption by approximately 1/290 compare to OpenMP implementation when 1000KB input data is applied. Furthermore, an additional 100 % performance improvement of the parallel AES algorithm was achieved by exploiting the characteristics of embedded GPUs such as removing copying data between GPU and host memory. Our results also demonstrate that higher performance improvement can be achieved with larger size of input data.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.37A no.10
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• pp.841-849
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• 2012

This paper proposes an low-complexity soft-output multiple-input multiple-output (soft-MIMO) detection algorithm for achieving soft-output maximum-likelihood (soft-ML) performance under max-log approximation. The proposed algorithm is based on a parallel tree-search (PTS) applying a channel ordering by a sorted-QR decomposition (SQRD) with altered sort order. The empty-set problem that can occur in calculation of log-likelihood ratio (LLR) for each bit is solved by inserting additional nodes at each search level. Since only the closest node is inserted among nodes with opposite bit value to a selected node, the proposed node insertion scheme is very efficient in the perspective of computational complexity. The computational complexity of the proposed algorithm is approximately 37-74% of that of existing algorithms, and from simulation results for a $4{\times}4$ system, the proposed algorithm shows a performance degradation of less than 0.1dB.

• The Transactions of the Korea Information Processing Society
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• v.6 no.11
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• pp.2946-2953
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• 1999

Finite automation is a mathematical model to represent a system with discrete inputs and outputs. Finite automata are a useful tool for solving problems such as text editor, lexical analyzer, and switching circuit. In this paper, given a deterministic finite automaton of an input string of length n and m states, we propose a constant time parallel algorithm that represents the transition states of finite automata and determines the acceptance of an input string on a reconfigurable mesh of size [nm/2]$\times$2m.

• 제어로봇시스템학회:학술대회논문집
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• 1996.10b
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• pp.1169-1172
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• 1996

A time-optimal control law for quick, strongly nonlinear systems has been developed and demonstrated. This procedure involves the utilization of neural networks as state feedback controllers that learn the time-optimal control actions by means of an iterative minimization of both the final time and the final state error for the known and unknown systems with constrained inputs and/or states. The nature of neural networks as a parallel processor would circumvent the problem of "curse of dimensionality". The control law has been demonstrated for a velocity input type motor identified by a genetic algorithm called GENOCOP.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.11
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• pp.1728-1735
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• 1989

A design procedure for microstrip bandpass filters using step impedance resonators (SIR's) and tapped input/output to a conventional parallel coupled line bandpass filter is presented. The filter configuration consisting of both half-wavelength and SIR's suppreses to spurious resonance response near the second harmonics, while tapping techniques offer benefit in situations where the impractical. The measured frequency responses of the designed filter are in close agreement with the computed responses.

• Journal of Korean Institute of Industrial Engineers
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• v.11 no.2
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• pp.47-56
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• 1985

This paper considers a two-product three-facility production planning model, where facility 1 produces product 1 to satisfy its own market requirements and supplies input to facility 2, and facility 2 requires another input from facility 3 (outside supplier). The objective is to determine the optimal production amount in each period in order to satisfy the dynamic demands on time, which minimizes the total cost of production and storage. The set-up cost is incurred jointly from the multi-facility operations.