• The Transactions of the Korean Institute of Electrical Engineers A
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• v.48 no.10
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• pp.1317-1326
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• 1999

As the integration ratio and operation speed increase, it has become an important problem to estimate the dissipated power during the design procedure as a method to reduce the TTM(time to market). This paper proposed a prediction model to estimate the maximum dissipated power of a CMOS logic gate. This model uses a calculational method. It was formed by including the characteristics of MOSFETs of which a CMOS gate consists, the operational characteristics of the gate, and the characteristics of the input signals. As the modeling process, a maximum power estimation model for CMOS inverter was formed first, and then a conversion model to convert a multiple input CMOS gate into a corresponding CMOS inverter was proposed. Finally, the power model for inverter was applied to the converted result so that the model could be applied to a general CMOS gate. For experiment, several CMOS gates were designed in layout level by $0.6{\mu}m$ layout design rule. The result by comparing the calculated results with those from HSPICE simulations for the gates showed that the gate conversion model has within 5% of the relative error rate to the SPICE and the maximum power estimation model has within 10% of the relative error rate. Thus, the proposed models have sufficient accuracies. Also in calculation time, the proposed models was more than 30 times faster than SPICE simulation. Consequently, it can be said that the proposed model could be used efficiently to estimate the maximum dissipated power of a CMOS logic gate during the design procedure.

• Transactions of the Korean Society of Automotive Engineers
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• v.5 no.1
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• pp.207-216
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• 1997

We developed the durability estimation and design systems to minimize the volume, considering the durability, efficiency, and design requirements of worm gears. That is, we consider each kind of factors affecting on durability on the basis of AGMA Standard for the cylindrical and double-enveloping worm gears. We also estimate input power on the basis of wear and durability, bending strength and deflection of worm shaft, and we developed the durability estimation and design systems of power transmission worm gears introducing the optimal design method on the personal computer to be easily used in field. Also, we developed a method which converts the design variables obtained from the optimal design method to integer values(number of worm threads, number of worm threads, number of worm wheel teeth, etc.,) to be used in real design and production. The developed durability estimation and design method can be easily applied to the design of worm gears used as power transmission devices in machineries and is expected to be used for weight minimization of worm gear unit.

• Proceedings of the KIEE Conference
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• 1995.11a
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• pp.271-273
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• 1995

This paper proposes the efficiency improvement method of vvcf-induction motor drives, which operates always at rated speed, regardless of load conditions, with counter emf estimation. The counter emf is estimated by detecting the fundamental component of motor input current, which is employed in speed control algorithm through the comparison with the actual counter emf during the nonconduction interval. The input power reduction by speed control is confirmed through simulations and experimental results.

• KSII Transactions on Internet and Information Systems (TIIS)
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• v.14 no.7
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• pp.2879-2890
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• 2020

In this paper, we study the estimation of angle, range and polarization parameters of a bistatic polarization sensitive frequency diverse array multiple-input multiple-output (PSFDA-MIMO) radar system. The application of polarization sensitive array in receiver is explored. A signal model of bistatic PSFDA-MIMO radar system is established. In order to utilize the multi-dimensional structure of array signals, the matched filtering radar data can be represented by a third-order tensor model. A joint estimation of the direction-of-departure (DOD), direction-of-arrival (DOA), range and polarization parameters based on parallel factor (PARAFAC) algorithm is proposed. The proposed algorithm does not need to search spectral peaks and singular value decomposition, and can obtain automatic pairing estimation. The method was compared with the existing methods, and the results show that the performance of the method is better. Therefore, the accuracy of the parameter estimation is further improved.

• Journal of Power Electronics
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• v.14 no.6
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• pp.1334-1344
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• 2014

A novel single phase Phase-Locked Loop (PLL) is proposed in this paper to accurately and rapidly estimate the instantaneous phase angle of a grid. A conjugate rotating vector pair is proposed and defined to synthesize the single phase signal in the stationary reference frame. With this concept, the proposed PLL innovatively sets one phase input of the PARK transformation to a constant zero. By means of a proper cancellation, a zero steady state phase angle estimation error can be achieved, even under magnitude and frequency variations. The proposed PLL structure is presented together with guidelines for parameters adjustment. The performance of the proposed PLL is verified by comprehensive experiments. Satisfactory phase angle estimation can be achieved within one input signal cycle, and the estimation error can be totally eliminated in four input cycles for the most severe conditions.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.49 no.8
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• pp.529-535
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• 2000

In this paper, a current control system of a single phase PWM AC/DC converter using a reduced-order Luenberger observer without source voltage sensors is proposed. The sinusoidal input current and unity input power factor are realised based on the estimated source voltage performed by the reduced-order Luenberger observer using actual currents and DC link voltage. The poles of the reduced-order Luenberger observer are placed in the left half plane of s-plane by the pole-placement method in order to acquire the stability of the observer. The magnitude and the phase of the estimated source voltage are used to accomplish the unity power factor. The proposed method is implemented by DSP(Digital Signal Processor). Experimental Results verify that the reduced-order observer estimates the source voltage without the estimation error and the control system accomplishes the unity power factor, and constant DC link voltage.

• Journal of Electrical Engineering and Technology
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• v.10 no.3
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• pp.1342-1348
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• 2015

The objective of this study is to propose a method to calculate prediction intervals for one-day-ahead hourly forecasts of photovoltaic power generation and to evaluate its performance. One year of data of two systems, representing contrasting examples of forecast’ accuracy, were used. The method is based on the maximum likelihood estimation, the similarity between the input data of future and past forecasts of photovoltaic power, and on an assumption about the distribution of the error of the forecasts. Two assumptions for the forecast error distribution were evaluated, a Laplacian and a Gaussian distribution assumption. The results show that the proposed method models well the photovoltaic power forecast error when the Laplacian distribution is used. For both systems and intervals calculated with 4 confidence levels, the intervals contained the true photovoltaic power generation in the amount near to the expected one.

• The Transactions of The Korean Institute of Electrical Engineers
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• v.56 no.1
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• pp.81-87
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• 2007

This paper proposes a new capacitance estimation scheme for a DC-link capacitor in a three-phase AC/DC/AC PWM converter. A controlled AC voltage with a lower frequency than the line frequency is injected into the DC-link voltage, which then causes AC power ripples at the DC side. By extracting the AC voltage and power components on the DC output side using digital filters, the capacitance can then be calculated using the Support Vector Regression (SVR). By training of SVR, a function which relates a given input (capacitor's power) and its corresponding output (capacitance value) can be derived. This function is used to predict outputs for given inputs that are not included in the training set. The proposed method does not require the information of DC-link current and can be simply implemented with only software and no additional hardware. Experimental results confirm that the estimation error is less than 0.16%.

• Proceedings of the KIPE Conference
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• 1999.07a
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• pp.671-674
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• 1999

In the PWM converter, PLL(Phase Locked Loop) is usually used as a tool which senses the angle of input voltage. This is sensitive to nois and needs additional hardware. In this work, we propose a sensorless control scheme of PWM converter using EKF(Extended Kalman Filter). EKF estimates a phase angle of input voltage from nonlinear state equation using measured phase currents. We control power factor and DC-link voltage utilizing the estimated phase angle. We demonstrate the effectiveness of the proposed estimation algorithm through simulations.

• Journal of Electrical Engineering and Technology
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• v.4 no.3
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• pp.360-364
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• 2009

This paper suggests the techniques in determining the values of the steady-state equivalent circuit parameters of a three-phase induction machine using genetic algorithm. The parameter estimation procedure is based on the steady-state phase current versus slip and input power versus slip characteristics. The propose estimation algorithm is of non-linear kind based on selection in genetic algorithm. The machine parameters are obtained as the solution of a minimization of objective function by genetic algorithm. Simulation shows good performance of the propose procedures.