• 한국정보통신설비학회:학술대회논문집
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• 한국정보통신설비학회 2007년도 학술대회
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• pp.390-393
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• 2007

The reliability as well as the power capability of the UPS system can be increased by replacing a single UPS unit with multiple small UPS units in parallel, resulting in a so-called module UPS. This module UPS system allows that a new module can be added or replaced while maintaining power to loads, which is a hot-swappable operation. In addition, it has desirable features such as ease of output power expandability, convenience of maintenance and repair, and high reliability. To realize the module UPS, load sharing without interconnection among parallel connecting modules as well as a small scale and lightweight topology is necessary. The frequency and voltage droop method is applied to parallel operation control to achieve load sharing. 5kVA modules are designed and implemented to confirm the effectiveness of the proposed approaches. Experimental results show that the module UPS system has a high power factor, a low distortion of output voltage and input current, hot-swappable operations and good load sharing characteristics.

• KIEE International Transaction on Electrical Machinery and Energy Conversion Systems
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• 제3B권1호
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• pp.44-51
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• 2003

The module UPS can flexibly implement expansion of power system capacities. Further-more, it can be used to build up the parallel redundant system to improve the reliability of power system operation. To realize the module UPS, load sharing without interconnection among parallel connecting modules as well as a small scale and lightweight topology is necessary. In this paper, the three-arm converter/inverter is compared with the general full-bridge and half-bridge topology from a practical point of view and chosen as the module UPS topology. The switching control approaches based on a pulse width modulation of the converter and inverter of the system are presented independently. The frequency and voltage droop method is applied to parallel operation control to achieve load sharing. Two prototype 3㎸A modules are designed and implemented to confirm the effectiveness of the pro-posed approaches. Experimental results show that the three-arm UPS system has a high power factor, a low distortion of output voltage and input current, and good load sharing characteristics.

• Journal of Power Electronics
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• 제15권3호
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• pp.652-659
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• 2015

This paper presents a new hybrid soft switching dc-dc converter with a low circulating current and high circuit efficiency. The proposed hybrid converter includes two sub-converters sharing two power switches. One is a three-level PWM converter and the other is a LLC converter. The LLC converter and the three-level converter share the lagging-leg switches and extend the zero-voltage switching (ZVS) range of the lagging-leg switches from nearly zero to full load since the LLC converter can be operated at f_sw (switching frequency) $\approx$ f_r (series resonant frequency). A passive snubber is used on the secondary side of the three-level converter to decrease the circulating current on the primary side, especially at high input voltage and full load conditions. Thus, the conduction losses due to the circulating current are reduced. The output sides of the two converters are connected in series. Energy can be transferred from the input voltage to the output load within the whole switching period. Finally, the effectiveness of the proposed converter is verified by experiments with a 1.44kW prototype circuit.

• 한국경영과학회:학술대회논문집
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• 대한산업공학회/한국경영과학회 2004년도 춘계공동학술대회 논문집
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• pp.52-55
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• 2004

VMS (virtual manufacturing system) may be defined as a transparent interface/control mechanism to support human decision-making via simulation and monitoring of real operating situation through modeling of all activities in RMS (real manufacturing system). The three main layers in VMS are business process layer, manufacturing execution layer, and facility operation layer, and each layer is represented by a specific software system having its own input modeler module. The current version of these input modelers has been implemented based on its own 'local' framework, and as a result, there are no information sharing mechanism, nor a common user view among them. Proposed in this paper is a unified modeler framework covering the three VMS layers, in which the concept of PPR (product-process-resource) model is employed as a common semantics framework and a 2D graphic network model is used as a syntax framework. For this purpose, abstract class PPRObject and GraphicObject are defined and then a subclass is inherited from the abstract class for each application layer. This feature would make it easier to develop and maintain the individual software systems. For information sharing, XML is used as a common data format.

• Journal of Power Electronics
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• 제12권2호
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• pp.258-267
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• 2012

An interleaved single-stage AC/DC converter with a boost converter and an asymmetrical half-bridge topology is presented to achieve power factor correction, zero voltage switching (ZVS) and load voltage regulation. Asymmetric pulse-width modulation (PWM) is adopted to achieve ZVS turn-on for all of the switches and to increase circuit efficiency. Two ZVS half-bridge converters with interleaved PWM are connected in parallel to reduce the ripple current at input and output sides, to control the output voltage at a desired value and to achieve load current sharing. A center-tapped rectifier is adopted at the secondary side of the transformers to achieve full-wave rectification. The boost converter is operated in discontinuous conduction mode (DCM) to automatically draw a sinusoidal line current from an AC source with a high power factor and a low current distortion. Finally, a 240W converter with the proposed topology has been implemented to verify the performance and feasibility of the proposed converter.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2007년도 하계종합학술대회 논문집
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• pp.433-434
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• 2007

This paper describes a low-voltage dynamic random-access memory (DRAM) focusing on subthreshold leakage reduction during self-refresh (sleep) mode. By sharing a power switch, multiple iterative circuits such as row and column decoders have a significantly reduced subthreshold leakage current. To reduce the leakage current of complex logic gates, dual channel length scheme and input vector control method are used. Because all node voltages during the standby mode are deterministic, zigzag super-cutoff CMOS is used, allowing to Preserve internal data. MTCMOS technique Is also used in the circuits having no need to preserve internal data. Sub-1.2-V 1-Gb mobile DDR DRAM employing all these low-power techniques was designed in a 60 nm CMOS technology and achieved over 77% reduction of overall leakage current during the self-refresh mode.

• 수산해양교육연구
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• 제23권2호
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• pp.234-243
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• 2011

Mindmap is effective method to analyze informations. And, through mindmap, students can be able to grow their ability of logical reconstruction. In Modern society, people have been developing IT technology and variety of portable devices. So, Educational environments have been being changed accordingly, too. In this study, we have implemented mindmap application that based on android to share the group member's thinking. To effective sharing, we have used mindmap technique and photo attachment feature. In this study, expert evaluation has been carried out by elementary current teachers. In result of this expert evaluation, we have obtained positive feedback at sharing function, input technique and information display. Also, teachers have gave feedbacks that they are willing to use this application in class, if classroom environment is possible.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2003년도 춘계전력전자학술대회 논문집(1)
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• pp.27-30
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• 2003

This paper describes two novel current fed high frequency resonant inverter can be used as the power supp]y for wax-sealing. This two topology can be obtained higher output frequency than switching frequency by composing modified unit inverter based on conventional half-bridge serial resonant inverter in parallel with input power source. also, By using time-sharing gate control method, this proposed inverter can not only realize the output control of dependence irrespective of the switching frequency using phase-shift but also reduce switching loss because it has ZVS function. Simulation results through the Pspice have demonstrated the feasibility of the proposed inverter. This proposed inverter will be able to be practically used as a power supply in various fields as induction heating applications, DC-DC converter etc.

• 전력전자학회논문지
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• 제15권4호
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• pp.327-334
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• 2010

본 논문에서는 새로운 quasi Z-소스 토폴로지의 동적전압보상기를 제안한다. 제안된 시스템은 quasi Z-소스 PWM 교류-교류 컨버터를 기반으로 하고 있으며, 입력단과 출력단은 공통 접지이고, 연속적인 입력전류 모드(CCM)로 동작하는 특징을 가지고 있다. 전원 전압의 sag와 swell을 검출하기 위하여, 피크치 전압 검출기법이 사용되었으며, 제안된 시스템의 동작 원리를 제시하고 회로 해석을 하였다. 제안된 시스템은 30% 전압 swell과 60%의 심한 전압 sag가 발생하여도 과전압과 부족전압에 대하여 순간적으로 보상을 하였으며, 부하전압을 정현파의 정격전압으로 유지할 수 있었다. PSIM 시뮬레이션과 실험결과를 통하여 본 연구의 타당성을 입증하였다.

• Journal of Power Electronics
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• 제15권3호
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• pp.610-620
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• 2015

An inherent zero-voltage and zero-current-switching phase-shifted full-bridge converter with reverse-blocking insulated-gate bipolar transistor (IGBT) or non-punch-through IGBT is proposed in this paper. This converter not only ensures that the switches in the lagging leg works at zero-current switching, but also minimizes circulating conduction loss without any additional auxiliary circuits. A 1.2 kW hardware prototype is designed, fabricated, and tested to verify the proposed topology. The control loop design procedures with small-signal models are also presented. A simple, low-cost, and robust democratic current-sharing circuit is also introduced and verified in this study. The proposed converter is a suitable alternative for compact, cost-effective applications with high-voltage input.