• Title/Summary/Keyword: Improving memory

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Protective Effect of Sesaminol Glucosides on Memory Impairment and ${\beta}$, ${\gamma}$-Secretase Activity In Vivo (Sesaminol Glucosides의 기억력 회복능 및 ${\beta}$, ${\gamma}$-Secretase)

  • Lee, Sun-Young;Son, Dong-Ju;Ha, Tae-Youl;Hong, Jin-Tae
    • YAKHAK HOEJI
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    • v.49 no.2
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    • pp.168-173
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    • 2005
  • Alzheimers disease (AD) is the most prevalent form of neurodegenerations associated with aging in the human population. This disease is characterized by the extracellular deposition of beta-amyloid (A ${\beta}$) peptide in cerebral plaques. The A ${\beta}$ peptide is derived from the ${\beta}$-amyloid precursor protein ( ${\beta}$APP). Photolytic processing of ${\beta}$APP by ${\beta}$-secretase(beta-site APP-cleaving enzyme, BASE) and ${\gamma}$-secretase generates the A ${\beta}$ peptide. Several lines of evidence support that A ${\beta}$-induced neuronal cell death is major mechanisms of development of AD. Accordingly, the ${\beta}$-and ${\gamma}$-secretase have been implicated to be excellent targets for the treatment of AD. We previously found that sesaminol glucosides have improving effect on memory functions through anti-oxidative mechanism. In this study, to elucidate possible other mechanism (inhibition of ${\beta}$-and ${\gamma}$-secretase) of sesaminol glucosides, we examined the improving effect of sesaminol glucosides in the scopolamine (1 mg/kg/mouse)-induced memory dysfunction using water maze test in the mice. Sesaminol glucosides (3.75, 7.5 mg/kg/6ml/day p.o., for 3 weeks) reversed the latency time, distance and velocity by scopolamine in dose dependent manner. Next, ${\beta}$-and ${\gamma}$-secretase activities were determined in different regions of brain. Sesaminol glucosides dose-dependently attenuated scopolamine-induced ${\beta}$-secretase activities in cortex and hippocampous and ${\gamma}$-secretase in cortex. This study therefore suggests that sesaminol glucosides may be a useful agent for prevention of the development or progression of AD, and its inhibitory effect on secretase may play a role in the improving action of sesaminol glucosides on memory function.

The Effect of Sunghyangjungkisan on the Learning and memory of Nitric Oxide Synthase Inhibitor-treated rats in the Morris Water Maze. (성향정기산(星香正氣散)이 NOS Inhibitor 투여(投與)에 의한 백서(白鼠)의 학습(學習) 및 기억장애(記憶障碍)에 미치는 영향(影響))

  • Park Jung-Hyun;Kim Jong-Woo
    • Journal of Oriental Neuropsychiatry
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    • v.10 no.2
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    • pp.105-113
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    • 1999
  • The purpose of this study was to investigate the effect of Sunhyangjungkisan on the learning and memory ability in rats. For this purpose we have evoked cerebral dysfunction in rats with NOS inhibitor and then performed the Morris water maze task for each rat. We have found that Sunghyangjungkisan have some improving effedts on impaired learning and memort ability in the NOS inhibitor treated rat. In these improving effects, memory effect was more evident then learning effect. This result implies that Sunghyangjungkisan may be one of useful prescriptions for treatment of vascular dementia after cerebral ischemia.

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Rehmannia glutinosa Ameliorates Scopolamine-Induced Learning and Memory Impairment in Rats

  • Lee, Bom-Bi;Shim, In-Sop;Lee, Hye-Jung;Hahm, Dae-Hyun
    • Journal of Microbiology and Biotechnology
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    • v.21 no.8
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    • pp.874-883
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    • 2011
  • Many studies have shown that the steamed root of Rehmannia glutinosa (SRG), which is widely used in the treatment of various neurodegenerative diseases in the context of Korean traditional medicine, is effective for improving cognitive and memory impairments. The purpose of this study was to examine whether SRG extracts improved memory defects caused by administering scopolamine (SCO) into the brains of rats. The effects of SRG on the acetylcholinergic system and proinflammatory cytokines in the hippocampus were also investigated. Male rats were administered daily doses of SRG (50, 100, and 200 mg/kg, i.p.) for 14 days, 1 h before scopolamine injection (2 mg/kg, i.p.). After inducing cognitive impairment via scopolamine administration, we conducted a passive avoidance test (PAT) and the Morris water maze (MWM) test as behavioral assessments. Changes in cholinergic system reactivity were also examined by measuring the immunoreactive neurons of choline acetyltransferase (ChAT) and the reactivity of acetylcholinesterase (AchE) in the hippocampus. Daily administration of SRG improved memory impairment according to the PAT, and reduced the escape latency for finding the platform in the MWM. The administration of SRG consistently significantly alleviated memory-associated decreases in cholinergic immunoreactivity and decreased interleukin-$1{\beta}$ (IL-$1{\beta}$) and tumor necrosis factor-${\alpha}$ (TNF-${\alpha}$) mRNA expression in the hippocampus. The results demonstrated that SRG had a significant neuroprotective effect against the neuronal impairment and memory dysfunction caused by scopolamine in rats. These results suggest that SRG may be useful for improving cognitive functioning by stimulating cholinergic enzyme activities and alleviating inflammatory responses.

Influence of Memory Intensive Training Program on Cognitive Function, Memory Performance, and Self-Esteem in Elderly People (기억강화프로그램이 노인의 인지기능, 자아존중감과 기억수행에 미치는 영향)

  • Jung, Myung-Sook;Kim, Jeong-Hwa
    • The Korean Journal of Rehabilitation Nursing
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    • v.13 no.2
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    • pp.161-170
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    • 2010
  • Purpose: This study was to confirm the influence of memory intensive training program on the elderly people's cognitive function, memory performance, and self-esteem. Method: Using a quasi-experimental or experimental design, 60 elderly aged over 60 years randomly assigned the experimental and control groups completed pretest-post evaluation. The experimental group participated in the memory intensive training program was offered to the participants in the experimental group for three weeks (2times/week). The t-test and $X^2$-test using SAS program. Results: 1) The cognitive function was significantly higher in the experimental group compared to that in the control group (t=3.26, p=.002). 2) The memory performance that included immediate word recall tasks, word recognition tasks and delayed word recall tasks was significantly higher in the experimental group than in the control group (t=5.30, p<.001). The experimental group showed significantly higher scores for memory performance than the control group (t=5.30, p<.001). 3) The self-esteem was higher in the experimental group than in the control group, but there was no significant difference between the two groups (t=1.94, p=.058). Conclusion: The Memory Intensive Training Program could be an effective intervention for improving cognitive function, and memory performance of the elderly people.

Technology Trends in CXL Memory and Utilization Software (CXL 메모리 및 활용 소프트웨어 기술 동향 )

  • H.Y. Ahn;S.Y. Kim;Y.M. Park;W.J. Han
    • Electronics and Telecommunications Trends
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    • v.39 no.1
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    • pp.62-73
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    • 2024
  • Artificial intelligence relies on data-driven analysis, and the data processing performance strongly depends on factors such as memory capacity, bandwidth, and latency. Fast and large-capacity memory can be achieved by composing numerous high-performance memory units connected via high-performance interconnects, such as Compute Express Link (CXL). CXL is designed to enable efficient communication between central processing units, memory, accelerators, storage, and other computing resources. By adopting CXL, a composable computing architecture can be implemented, enabling flexible server resource configuration using a pool of computing resources. Thus, manufacturers are actively developing hardware and software solutions to support CXL. We present a survey of the latest software for CXL memory utilization and the most recent CXL memory emulation software. The former supports efficient use of CXL memory, and the latter offers a development environment that allows developers to optimize their software for the hardware architecture before commercial release of CXL memory devices. Furthermore, we review key technologies for improving the performance of both the CXL memory pool and CXL-based composable computing architecture along with various use cases.

Study on Improving the Mechanical Stability of 3D NAND Flash Memory String During Electro-Thermal Annealing (3D NAND 플래시메모리 String에 전열어닐링 적용을 가정한 기계적 안정성 분석 및 개선에 관한 연구)

  • Kim, Yu-Jin;Park, Jun-Young
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.35 no.3
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    • pp.246-254
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    • 2022
  • Localized heat can be generated using electrically conductive word-lines built into a 3D NAND flash memory string. The heat anneals the gate dielectric layer and improves the endurance and retention characteristics of memory cells. However, even though the electro-thermal annealing can improve the memory operation, studies to investigate material failures resulting from electro-thermal stress have not been reported yet. In this context, this paper investigated how applying electro-thermal annealing of 3D NAND affected mechanical stability. Hot-spots, which are expected to be mechanically damaged during the electro-thermal annealing, can be determined based on understanding material characteristics such as thermal expansion, thermal conductivity, and electrical conductivity. Finally, several guidelines for improving mechanical stability are provided in terms of bias configuration as well as alternative materials.

Scratchpad Memory Architectures and Allocation Algorithms for Hard Real-Time Multicore Processors

  • Liu, Yu;Zhang, Wei
    • Journal of Computing Science and Engineering
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    • v.9 no.2
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    • pp.51-72
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    • 2015
  • Time predictability is crucial in hard real-time and safety-critical systems. Cache memories, while useful for improving the average-case memory performance, are not time predictable, especially when they are shared in multicore processors. To achieve time predictability while minimizing the impact on performance, this paper explores several time-predictable scratch-pad memory (SPM) based architectures for multicore processors. To support these architectures, we propose the dynamic memory objects allocation based partition, the static allocation based partition, and the static allocation based priority L2 SPM strategy to retain the characteristic of time predictability while attempting to maximize the performance and energy efficiency. The SPM based multicore architectural design and the related allocation methods thus form a comprehensive solution to hard real-time multicore based computing. Our experimental results indicate the strengths and weaknesses of each proposed architecture and the allocation method, which offers interesting on-chip memory design options to enable multicore platforms for hard real-time systems.

An Implementation of Multiple Access Memory System for High Speed Image Processing (고속 영상처리를 위한 다중접근 기억장치의 구현)

  • 김길윤;이형규;박종원
    • Journal of the Korean Institute of Telematics and Electronics B
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    • v.29B no.10
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    • pp.10-18
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    • 1992
  • This paper considers and implementation of the memory system which provides simultaneous access to pq image points of block(p$\times$q), horizontal vector(1$\times$pq)and/vertical vector(pq$\times$1) in 2-dimension image array, where p and q are design parameters. This memory system consists of an address calculation circuit, address routing circuit, data routing circuit, module selection circuit and m memory modules where m>qp. The address calculation circuit computes pq addresses in parallel by using the difference of addresses among image points. Extra module assignment circuit is not used by improving module selection circuit with routhing circuit. By using Verilog-XL logic simulator, we verify the correctness of the memory system and estimate the performance. The implemented system provides simultaneous access to 16 image points and is 6 times faster than conventional memory system.

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A Technique for Improving the Performance of Cache Memories

  • Cho, Doosan
    • International Journal of Internet, Broadcasting and Communication
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    • v.13 no.3
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    • pp.104-108
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    • 2021
  • In order to improve performance in IoT, edge computing system, a memory is usually configured in a hierarchical structure. Based on the distance from CPU, the access speed slows down in the order of registers, cache memory, main memory, and storage. Similar to the change in performance, energy consumption also increases as the distance from the CPU increases. Therefore, it is important to develop a technique that places frequently used data to the upper memory as much as possible to improve performance and energy consumption. However, the technique should solve the problem of cache performance degradation caused by lack of spatial locality that occurs when the data access stride is large. This study proposes a technique to selectively place data with large data access stride to a software-controlled cache. By using the proposed technique, data spatial locality can be improved by reducing the data access interval, and consequently, the cache performance can be improved.