• Title/Summary/Keyword: Implementation Phase

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Implementation Status and Improvement Strategy of the Value Engineering in Domestic Construction Industry (국내 건설VE 운영현황과 발전방향)

  • Seo, Yong-Chil
    • Proceedings of the Korean Institute Of Construction Engineering and Management
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    • 2007.11a
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    • pp.137-144
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    • 2007
  • In the year of 1980 and 2000, the Korean government institutionalized the Value Engineering methodology in the construction phase and the design phase respectively. While design-phase VE have been applied to construction industry actively, which was institutionalized 7 years ago, construction-phase VE have not been applied to industry frequently, although it was institutionalized 25 years ago. On the other hand, at the time of social demands for VE is increasing, it has been pointed out that VE should be compatible with the delivery system. And the time of VE study, the operational management of VE study, and the maintenance process of the result of the VE study also should be considered. In this study, a scheme to improve VE methodology in the construction industry is proposed based on the literature review and the data analysis of domestic and foreign state of VE.

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A Study on the Implementation of Direct Digital Frequency Synthesizer using the synthesized Clock Counting Method to make the State of randomly Frequency Hopping (주파수 도약용 표본클럭 합성 계수 방식의 직접 디지틀 주파수 합성기 구현에 관한 연구)

  • 장은영;이성수;김원후
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.16 no.10
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    • pp.914-924
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    • 1991
  • It has been generally used for PLL(Phase Locked Loop) to be synthesized randomly chosen frequency state, but the PLL locking time was inevitable element. A direct digital synthesizer. Which makes output frequency directly in sine wave by a phase accumulating method, could be leiminate the defect, although a phase distortion in frequency spectrum. In order to improve this disadvantage, the phase accumulating method is reconsidered in the side of he output wave formula expression. A new mechanism is proposed, and it is constructed by a most suitable logic elements. The spectrum of synthesized sine waveform is simulated and compared with a measured value, and it’s the coherence frequency hoppong state with the PN(Pseudo Noise) code sequence is confirmed. In this results, the power levels of phase distortion harmonics are decreased to 10~25dB and bandwidths are increased to 420kHz.

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A Study On High Power Factor Sine Pulse Type Power Supply For Atmospheric Pressure Plasma Cleaning System with 3-Phase PFC Boost Converter (3상 PFC 부스트 컨버터를 채용한 상압플라즈마 세정기용 고역률 정형파 펄스 출력형 전원장치에 관한 연구)

  • Han, Hee-Min;Kim, Min-Young;Seo, Kwang-Duk;Kim, Joohn-Sheok
    • The Transactions of the Korean Institute of Power Electronics
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    • v.14 no.1
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    • pp.72-81
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    • 2009
  • This paper presents quasi-resonant type high power factor ac power supply for atmospheric pressure plasma cleaning system adopting three phase PFC boost converter and it's control method. The presented ac power supply consists of single phase H-bridge inverter, step-up transformer for generating high voltage and three phase PFC boost converter for high power factor on source utility. Unlikely to the traditional LC resonant converter, the propose one has an inductor inside only. A single resonant takes place through the inside inductor and the capacitor from the plasma load modeled into two series capacitor and one resistance. The quasi-resonant can be achieved by cutting the switching signal when the load current decrease to zero. To obtain power control ability, the propose converter controlled by two control schemes. One is the changing output pulse period scheme in the manner of PFM(Pulse Frequency Modulation) control. On the other, to provide more higher power to load, the DC rail voltage is directly controlled by the 3-phase PFC boost converter. The significant merits of the proposed converter are the uniform power providing capability for high quality plasma generation and low reactive power in AC and DC side. The proposed work is verified through digital simulation and experimental implementation.

An R package UnifiedDoseFinding for continuous and ordinal outcomes in Phase I dose-finding trials

  • Pan, Haitao;Mu, Rongji;Hsu, Chia-Wei;Zhou, Shouhao
    • Communications for Statistical Applications and Methods
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    • v.29 no.4
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    • pp.421-439
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    • 2022
  • Phase I dose-finding trials are essential in drug development. By finding the maximum tolerated dose (MTD) of a new drug or treatment, a Phase I trial establishes the recommended doses for later-phase testing. The primary toxicity endpoint of interest is often a binary variable, which describes an event of a patient who experiences dose-limiting toxicity. However, there is a growing interest in dose-finding studies regarding non-binary outcomes, defined by either the weighted sum of rates of various toxicity grades or a continuous outcome. Although several novel methods have been proposed in the literature, accessible software is still lacking to implement these methods. This study introduces a newly developed R package, UnifiedDoseFinding, which implements three phase I dose-finding methods with non-binary outcomes (Quasi- and Robust Quasi-CRM designs by Yuan et al. (2007) and Pan et al. (2014), gBOIN design by Mu et al. (2019), and by a method by Ivanova and Kim (2009)). For each of the methods, UnifiedDoseFinding provides corresponding functions that begin with next that determines the dose for the next cohort of patients, select, which selects the MTD defined by the non-binary toxicity endpoint when the trial is completed, and get oc, which obtains the operating characteristics. Three real examples are provided to help practitioners use these methods. The R package UnifiedDoseFinding, which is accessible in R CRAN, provides a user-friendly tool to facilitate the implementation of innovative dose-finding studies with nonbinary outcomes.

Quasi-brittle and Brittle Fracture Simulation Using Phase-field Method based on Cell-based Smoothed Finite Element Method (셀기반 평활화 유한요소법에 기반한 위상분야법을 이용한 준취성 및 취성 파괴 시뮬레이션)

  • Changkye Lee;Sundararajan Natarajan;Jurng-Jae Yee
    • Journal of the Computational Structural Engineering Institute of Korea
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    • v.36 no.5
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    • pp.295-305
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    • 2023
  • This study introduces a smoothed finite-element implementation into the phase-field framework. In recent years, the phase-field method has recieved considerable attention in crack initiation and propagation since the method needs no further treatment to express the crack growth path. In the phase-field method, high strain-energy accuracy is needed to capture the complex crack growth path; thus, it is obtained in the framework of the smoothed finite-element method. The salient feature of the smoothed finite-element method is that the finite element cells are divided into sub-cells and each sub-cell is rebuilt as a smoothing domain where smoothed strain energy is calculated. An adaptive quadtree refinement is also employed in the present framework to avoid the computational burden. Numerical experiments are performed to investigate the performance of the proposed approach, compared with that of the finite-element method and the reference solutions.

Redesign Application Architecture for Advanced Volcanic Disaster Response System (화산재해대응시스템 고도화를 위한 응용아키텍처 재설계)

  • Youn, Junhee;Kim, Tae-Hoon;Kim, Dusik
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.19 no.3
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    • pp.90-95
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    • 2018
  • The Korean Peninsula is no longer safe from volcanic disasters. Therefore, the Korean government has been developing a spatial information-based system implementation technology since 2014. VDRS (Volcanic Disaster Response System), which is the result of the technology, was implemented in 2016 as Phase I. Since then, phase II implementation technology has been developed for an advanced system reflecting the user's requirements. To advance the system, redesign architecture is essential. This paper examined the redesign application architecture for an advanced VDRS. First, existing application architecture, which was implemented in phase I, was analyzed. Second, the user's requirements for advanced VDRS were analyzed. The analyzed user's requirements were categorized as a transforming service oriented to a business-oriented architecture, improving accuracy, and expanding the spatial range and target disaster. Third, application architecture was redesigned based on gap analysis between the existing architecture and user's requirements. The results of the proposed redesign architecture are presented as the application system structure and description of the application function based on owner's point of view in the enterprise architecture. The results of this paper can be used to derive the application module design and provide a detailed description of the application module based on the designer's point of view. Further research focused on structuring the HW/SW architecture will be required for system implementation.

Fractional Multi-bit Differential Detection Technique for Continuous Phase Modulation

  • Lee, Kee-Hoon;Seo, Jong-Soo
    • ETRI Journal
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    • v.26 no.6
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    • pp.635-640
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    • 2004
  • A new low-complexity differential detection technique, fractional multi-bit differential detection (FMDD), is proposed in order to improve the performance of continuous phase modulation (CPM) signals such as Gaussian minimum shift keying (GMSK) and Gaussian frequency shift keying (GFSK). In comparison to conventional one-bit differential detected (1DD) GFSK, the FMDD-employed GFSK provides a signal-to-noise ratio advantage of up to 1.8 dB in an AWGN channel. Thus, the bit-error rate performance of the proposed FMDD is brought close to that of an ideal coherent detection while avoiding the implementation complexity associated with the carrier recovery. In the adjacent channel interference environment, FMDD achieves an even larger SNR advantage compared to 1DD.

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FPGA Implementation of Resolver-based Absolute Position Sensor Driver (레졸버 기반의 절대위치 검출 센서 드라이버의 FPGA 구현)

  • Jeon, Ji-Hye;Shin, Dong-Yun;Yang, Yoon-Gi;Hwang, Jin-Kwon;Lee, Chang-Su
    • Journal of Institute of Control, Robotics and Systems
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    • v.13 no.10
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    • pp.970-977
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    • 2007
  • Absolute position detector which is one of the major equipment in the field of factory automation, not only perceives the absolute position of the rotary machine but also outputs switch data according to the given angle. Absolute position detector is composed of sensor module and its controller. In this paper, a sensor driver is implemented using FPGA with VHDL. This chip has a less form factor than conventional circuit. A test shows reliable precision within THD(total harmonic distortion) of 0.2% which can be applicable commercially. Also, FPGA-based phase error compensation methods were newly discussed. In the future, more research will be conducted to enhance the precision by the introduction of 3-phase transformer.

Weighted Least-Squares Design and Parallel Implementation of Variable FIR Filters

  • Deng, Tian-Bo
    • Proceedings of the IEEK Conference
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    • 2002.07a
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    • pp.686-689
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    • 2002
  • This paper proposes a weighted least-squares(WLS) method for designing variable one-dimensional (1-D) FIR digital filters with simultaneously variable magnitude and variable non-integer phase-delay responses. First, the coefficients of a variable FIR filter are represented as the two-dimensional (2-D) polynomials of a pair of spectral parameters: one is for tuning the magnitude response, and the other is for varying its non-integer phase-delay response. Then the optimal coefficients of the 2-D polynomials are found by minimizing the total weighted squared error of the variable frequency response. Finally, we show that the resulting variable FIR filter can be implemented in a parallel form, which is suitable for high-speed signal processing.

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Design and Implementation of Boost Type Single Phase Inverter System for Compensation of Voltage Sag (전압강하 보상을 위한 승압형 단상 인버터 시스템의 설계 및 구현)

  • Lee, Seung-Yong;Seo, Young-Min;Hong, Soon-Chan
    • Proceedings of the KIPE Conference
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    • 2011.11a
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    • pp.219-220
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    • 2011
  • In this paper, 300[W] class boost type single phase inverter system which can compensate voltage sag was designed. If the voltage sag has appeared in input voltage, the boost converter would be operated to compensate it. The system is designed for that the THD of ouput voltage is below 5[%] and steady state error of output voltage is below 1[%]. The system was verified through experiments.

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