• 제목/요약/키워드: Impedance matching circuit

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Broadband Impedance Matching Circuit Design for PLC Coupler Using Tchebycheff Equalizer

  • Kim, Gi-Rae;Tangyao, Xie
    • Journal of information and communication convergence engineering
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    • 제7권2호
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    • pp.113-118
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    • 2009
  • This paper is about design broadband impedance matching circuit for Coupler to improve power transfer efficiency in the power line communication (PLC) system. The Tchebycheff gain function algorithm is represented to design broadband matching circuit. A practical PLC Coupler impedance matching circuit is designed, and the characteristics for S11 and S21 of PLC coupler are enhanced comparing with unmatched one. This is done by maximizing the power transfer gain from modem to the load.

Design of Broadband Impedance Matching Circuit for PLC Coupler using Butterworth Equalizer

  • Xie, Tangyao;Kim, Gi-Rae
    • Journal of information and communication convergence engineering
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    • 제8권3호
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    • pp.258-262
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    • 2010
  • This paper represents design broadband impedance matching circuit for Coupler to improve power transfer efficiency in the broadband power line communication(BPLC) systems. The Butterworth gain function equalizer is used to design broadband matching circuit. A practical PLC Coupler impedance matching circuit is designed, and the characteristics for S11 and S21 of PLC Coupler are enhanced comparing with unmatched one. This is done by maximizing the power transfer gain from modem to the load.

소나 송신기의 정합회로 설계를 위한 수중 음향 압전 트랜스듀서의 등가회로 파라미터 추정 (Estimation of Equivalent Circuit Parameters of Underwater Acoustic Piezoelectric Transducer for Matching Network Design of Sonar Transmitter)

  • 이정민;이병화;백광렬
    • 한국군사과학기술학회지
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    • 제12권3호
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    • pp.282-289
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    • 2009
  • This paper presents an estimation technique of the equivalent circuit parameters for an underwater acoustic piezoelectric transducer from the measured impedance. Estimated equivalent circuit can be used for the design of the impedance matching network of the sonar transmitter. A fitness function is proposed to minimize the error between the calculated impedance of the equivalent circuit and the measured impedance of the transducer. The equivalent circuit parameters are estimated by using the fitness function and the PSO(Particle Swarm Optimization) algorithm. The effectiveness of the proposed method is verified by the applications to a sandwich-type transducer and a dummy load. In addition, the impedance matching network is also designed by using the estimated equivalent circuit model.

축전 용량이 고려된 평판형 유도 결합 플라즈마 원의 등가회로 모델 (An equivalent Circuit Model of Transformer Coupled Plasma Source)

  • 김정미;권득철;윤남식
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2002년도 하계학술대회 논문집 C
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    • pp.1760-1762
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    • 2002
  • In this work we develop an equivalent circuit model of TCP(transformer coupled plasma) source and investigate matching characteristic. The developed circuit model includes transmission line, standard-type impedance matching network and displacement current in the plasma source. The impedance of TCP is calculated by previously developed program for various source parameters and dependance of components of matching impedance on the value of source impedance is investigated.

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네거티브 임피던스 변환기에 기반을 둔 저항성 V 다이폴 안테나의 논 포스터 임피던스 매칭 (NIC-Based Non-Foster Impedance Matching of a Resistively Loaded Vee Dipole Antenna)

  • 양혜민;김강욱
    • 한국전자파학회논문지
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    • 제26권7호
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    • pp.597-605
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    • 2015
  • 네거티브 임피던스 변환기를 이용한 전기적 소형 안테나의 논 포스터 임피던스 매칭 방법을 제안한다. 사용한 안테나는 저항성 V 다이폴 안테나로써, 이 안테나는 급전점에서 매우 큰 입력 리액턴스를 가지기 때문에 반사손실이 매우 크다. 급전점에 장착하는 논 포스터 매칭 회로는 두 단의 네거티브 임피던스 변환기와 단 사이의 추가 커패시턴스로 이루어진다. 네거티브 임피던스 변환기는 연산 증폭기와 저항 소자를 사용하여 구현한다. 실제 사용하는 연산 증폭기의 유한 오픈 루프 이득을 고려한 임피던스를 분석하고, 설계에 적용하였다. 안테나 입력 임피던스를 포함한 전체 매칭 회로에 대해 안정성 검사를 수행하였고, 설계된 매칭 회로는 제작되어 실험으로 그 성능을 검증하였다. 임피던스 매칭 후의 저항성 V 다이폴 안테나의 입력 임피던스를 측정한 결과, 제안한 논 포스터 매칭 회로가 효과적으로 안테나의 입력 리액턴스를 줄이는 것을 확인하였다.

A Study of Impedance Matching Circuit Design for PLC

  • Kim, Gi-Rae
    • Journal of information and communication convergence engineering
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    • 제7권4호
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    • pp.453-458
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    • 2009
  • This paper presents two methods of designing a Broadband Impedance Matching (BIM) circuit for maximizing a power line communication (PLC) equipment (or Modem) signal injection into its load at any power line connection port. This optimal (BIM) circuit design is achieved in two phases: Butterworth gain function and Tchebycheff gain function. According to the comparison of simulation and practical results, the performances of two gain functions on BIM are discussed.

질소 플라즈마의 임피이던스 특성 및 정합회로 설계 (Impedance Characteristics of N2 Plasma and Matching Circuit Design)

  • 황기웅;김원규
    • 대한전기학회논문지
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    • 제35권12호
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    • pp.560-566
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    • 1986
  • In the design of an RF discharge system, the electrical equivalence of the gas discharge must be known. With this knowledge, one can design a suitable matching network for a maximum power transfer from the RF generator into the discharge. For this purpose, an experiment has been conducted in which the electrical impedance (conductance and capacitance) was determined as a function of power. In parallel with this, a detailed theoretical analysis has been done and the results are in accord with those of our experiment. Design equations are also given for a simple matching network, and a design example is presented to demonstrate its application. During the actual operation of an RF discharge system, however, it has been often observed that the reflected power tends to vary in small values due to the changes in the impedance of the system. This problem can be relieved by adding an automatic impedance matching circuit to the system and this paper presents such an automatic impedance matching network.

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페이저도에 의한 임피던스 정합회로 설계 해석 (Design Analysis of Impedance Matching Circuit by Phasor Plot)

  • 원라경
    • 한국정보통신학회논문지
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    • 제26권11호
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    • pp.1686-1696
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    • 2022
  • 본 논문에서 소개하는 페이저도에 의한 임피던스 정합회로 설계는 회로이론의 임피던스 삼각도에 기초한다. 정합회로 설계에 주어진 값들을 이용하여 페이저 도형의 작도를 통하여 설계하는 기법이다. 설계 패턴은 L형, 역L형, T형, 𝜋형을 기본으로, 미지의 리액턴스 소자를 페이저 도형을 통하여 결정한다. 본 논문에서는 입력과 출력포트가 순저항인 경우와 리액턴스를 갖는 경우의 몇 가지 사례에 대하여 설계하고 이를 직병렬 등가변환에 의하여 설계값을 검증하여 정합이 이루어짐을 확인하였다. 본 설계 기법은 입출력 위상이나 크기를 바로 파악할 수 있어 설계의 변경과 적용이 신속하여 주로 낮은 주파수 대역에서 적용이 기대된다.

Non-Foster 회로를 이용한 FM 안테나의 신호 대 잡음비 개선 (Signal-to-noise Ratio Improvement of a FM Antenna Using a Non-Foster Circuit)

  • 박홍우;강승택;김홍준
    • 전기학회논문지
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    • 제65권2호
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    • pp.329-334
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    • 2016
  • In this paper, we demonstrate a Non-Foster matching method for an electrically small antenna to improve the signal-to-noise ratio (SNR) of communication link. For the experiment, we used a general FM antenna whose resonance frequency is about 52-57 MHz and a floating type Linvill negative impedance converter(NIC)-based circuit as a Non-Foster matching element. By implementing the Non-Foster circuit to cover FM band, we can achieve a wide bandwidth matching covers 40-200 MHz. Our measurement shows 3-7 dB improvement of SNR for the same bandwidth though there are several spikes which means no improvement of SNR in the band.

A New Approach for Built-in Self-Test of 4.5 to 5.5 GHz Low-Noise Amplifiers

  • Ryu, Jee-Youl;Noh, Seok-Ho
    • ETRI Journal
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    • 제28권3호
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    • pp.355-363
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    • 2006
  • This paper presents a low-cost RF parameter estimation technique using a new RF built-in self-test (BIST) circuit and efficient DC measurement for 4.5 to 5.5 GHz low noise amplifiers (LNAs). The BIST circuit measures gain, noise figure, input impedance, and input return loss for an LNA. The BIST circuit is designed using $0.18\;{\mu}m$ SiGe technology. The test technique utilizes input impedance matching and output DC voltage measurements. The technique is simple and inexpensive.

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