• Title/Summary/Keyword: ISE simulation

Search Result 46, Processing Time 0.027 seconds

Control of Unstable Systems Concerned with the Performance Indexes and Constraints (성능지수와 제약조건을 고려한 불안정 시스템의 제어)

  • Ahn, Jong-Kap;Lee, Yun-Hung;So, Myung-Ok
    • Journal of Advanced Marine Engineering and Technology
    • /
    • v.32 no.5
    • /
    • pp.785-790
    • /
    • 2008
  • A technique for determining the feedback gain of the states feedback controller using a real-coded genetic algorithm(RCGA) is presented. It is concerned with the states error to the performance index of a RCGA. As for assessing the performance of the controller three performance criteria (ISE. IAE and ITAE) are adopted. And designing the controller involves a constrained optimization problem. Therefore a real-coded genetic algorithm incorporating the penalty strategy is used. The performance of the proposed method is demonstrated through a set of simulation about an inverted pendulum system.

A GA based on-line tuning of robust minimax I-PD controller with penalty on manipulated variable

  • Kawabe, Tohru;Tagami, Takanori;Katayama, Tohru
    • 제어로봇시스템학회:학술대회논문집
    • /
    • 1995.10a
    • /
    • pp.428-431
    • /
    • 1995
  • In this paper we propose an on-line tuning method by using genetic algorithm for robust minimax I-PD controller based on new criterion. The new criterion is the Integral of Squared Error (ISE) with a penalty of the derivative of manipulated variable. The work focuses on robust tuning of I-PD controller's parameters in the presence of plant parameter uncertainty. The result of several simulation studies are provided to illustrate the performance of this robust tunig method.

  • PDF

PID Control of Unstable Processes with Time Delay (시간지연을 갖는 불안정한 시스템의 PID 제어)

  • Lee, Soo-Lyong;Lee, Yun-Hyung;Ahn, Jong-Kap;Son, Jung-Ki;Ryu, Ki-Tak;So, Myung-Ok
    • Journal of Advanced Marine Engineering and Technology
    • /
    • v.33 no.5
    • /
    • pp.721-728
    • /
    • 2009
  • PID control is widely used to control stable processes, however, PID control for unstable processes is less common. In this paper, systematic tuning methods are derived to tune the PID controller for unstable FOPTD(Forst Order Plus Time Delay) processes. The proposed PID controllers for set-point tracking and disturbance rejection problem are tuned based on minimizing the performance indexes (IAE, ISE, ITAE) using a real-coded genetic algorithm. Simulation example is given to illustrate the set-point tracking and disturbance rejection performance of the proposed method.

The Design of SoC for DCT/DWT Processor (DCT/DWT 프로세서를 위한 SoC 설계)

  • Kim, Young-Jin;Lee, Hyon-Soo
    • Proceedings of the IEEK Conference
    • /
    • 2006.06a
    • /
    • pp.527-528
    • /
    • 2006
  • In this paper, we propose an IP design and implementation of System on a chip(SoC) for Discrete Cosine Transform (DCT) and Discrete Wavelet Transform (DWT) processor using adder-based DA(Adder-based Distributed Arithmetic). To reduced hardware cost and to improve operating speed, the combined DCT/ DWT processor used the bit-serial method and DA module. The transform of coefficient equation result in reduction in hardware cost and has a regularity in implementation. We use Verilog-HDL and Xilinx ISE for simulation and implement FPGA on SoCMaster-3.

  • PDF

Tuning Rules of the PID Controller Using RCGAs (RCGA를 이용한 외란제거용 PID 제어기의 동조규칙)

  • Kim, Min-Jung;Lee, Yun-Hyung;So, Myung-Ok;Ha, Yun-Soo;Hwang, Sung-Wook;Jin, Gang-Gyoo
    • Journal of Advanced Marine Engineering and Technology
    • /
    • v.31 no.4
    • /
    • pp.448-454
    • /
    • 2007
  • The new tuning rules of the PID controller for the rejection of load disturbance are proposed incorporating with real-coded genetic algorithms (RCGAs). The optimal gain parameters of the PID controller for a first-order plus time delay model are obtained based on a RCGA. Then tuning formula are derived using the tuned parameters sets potential tuning rule models and another RCGA. The performance criteria of the controller are adopted as ISE, IAE and ITAE. A series of simulation are carried out to verify the effectiveness of the proposed tuning rules.

Subthreshold Characteristics of a 50 nm Impact Ionization MOS Transistor (50 nm Impact Ionization MOS 소자의 Subthreshold 특성)

  • Yoon, Jee-Young;Ryu, Jang-Woo;Jung, Min-Chul;Sung, Man-Young
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
    • /
    • 2005.07a
    • /
    • pp.105-106
    • /
    • 2005
  • The impact ionization MOS (I-MOS) transistor with 50nm channel length is presented by using 2-D device simulator ISE-TCAD. The subthreshold slope cannot be steeper than kT/q since the subthreshold conduction is due to diffusion current. As MOSFETs are scaled down, this problem becomes significant and the subthreshold slope degrades which leads an increase in the off-current and off-state power dissipation. The I-MOS is based on a gated p-i-n structure and the subthreshold conduction is induced by impact ionization. The simulation results show that the subthreshold slope is 11.7 mV/dec and this indicates the I-MOS improves the switching speed and off-state characteristics.

  • PDF

A Study on the Calibration of GaAs-based 0.1-$\mu\textrm{m}$ $\Gamma$-gate MHEMT DC/RF Characteristics for the Development and Fabrication of over-100-GHz Millimeter-wave HEMT devices (100GHz 이상의 밀리미터파 HEMT 소 제작 및 개발을 위한 GaAs기반 0.1$\mu\textrm{m}$ $\Gamma$-게이트MHEMT의 DC/RF 특성에 대한 calibration 연구)

  • 손명식;이복형;이진구
    • Proceedings of the IEEK Conference
    • /
    • 2003.07b
    • /
    • pp.751-754
    • /
    • 2003
  • Metamorphic HEMTs (MHEMTs) have emerged as excellent challenges for the design and fabrication of high-speed HEMTs for millimeter-wave applications. Some of improvements result from improved mobility and larger conduction band discontinuity in the channel, leading to more efficient modulation doping, better confinement, and better device performance compared with pseudomorphic HEMTs. We have studied the calibration on the DC and RF characteristics of the MHEMT device using I $n_{0.53}$G $a_{0.47}$As/I $n_{0.52}$A1$_{0.48}$As modulation-doped heterostructure on the GaAs wafer. For the optimized device performance simulation, we calibrated the device performance of 0.1-${\mu}{\textrm}{m}$ $\Gamma$-gate MHEMT fabricated in our research center using the 2D ISE-DESSIS device simulator. With this calibrated parameter set, we have obtained very good reproducibility. The device simulation on the DC and RF characteristics exhibits good reproducibility for our 0.1-${\mu}{\textrm}{m}$ -gate MHEMT device compared with the measurements. We expect that our calibration result can help design over-100-GHz MHEMT devices for better device performance.ormance.

  • PDF

Design and Implementation of Modified Current Source Based Hybrid DC - DC Converters for Electric Vehicle Applications

  • Selvaganapathi, S.;Senthilkumar, A.
    • Transactions on Electrical and Electronic Materials
    • /
    • v.17 no.2
    • /
    • pp.57-68
    • /
    • 2016
  • In this study, we present the modern hybrid system based power generation for electric vehicle applications. We describe the hybrid structure of modified current source based DC - DC converters used to extract the maximum power from Photovoltaic (PV) and Fuel Cell system. Due to reduced dc-link capacitor requirement and higher reliability, the current source inverters (CSI) better compared to the voltage source based inverter. The novel control strategy includes Distributed Maximum Power Point Tracking (DMPPT) for photovoltaic (PV) and fuel cell power generation system. The proposed DC - DC converters have been analyzed in both buck and boost mode of operation under duty cycle 0.5>d, 0.5<d<1 and 0.5<d for capable electric vehicle applications. The proposed topology benefits include one common DC-AC inverter that interposes the generated power to supply the charge for the sharing of load in a system of hybrid supply with photovoltaic panels and fuel cell PEM. An improved control of Direct Torque and Flux Control (DTFC) based induction motor fed by current source converters for electric vehicle.In order to achieve better performance in terms of speed, power and miles per gallon for the expert, to accepting high regenerative braking current as well as persistent high dynamics driving performance is required. A simulation model for the hybrid power generation system based electric vehicle has been developed by using MATLAB/Simulink. The Direct Torque and Flux Control (DTFC) is planned using Xilinx ISE software tool in addition to a Modelsim 6.3 software tool that is used for simulation purposes. The FPGA based pulse generation is used to control the induction motor for electric vehicle applications. FPGA has been implemented, in order to verify the minimal error between the simulation results of MATLAB/Simulink and experimental results.

Configurations of AC and DC-type Quality Control Center for a New Distribution System FRIENDS

  • Hayashi Yusuke;Saisyo Masaki;Ise Toshifumi;Tsuji Kiichiro
    • Proceedings of the KIPE Conference
    • /
    • 2001.10a
    • /
    • pp.497-501
    • /
    • 2001
  • Unbundled power quality service is paid much attention under the circumstances of deregulation and diversification of needs of customers for quality and price of electric power. Moreover, distributed generators (DGs) such as photovoltaic generations and wind turbines will be introduced to distribution system more and more, and reverse flow of active power has possibility to cause new problems in the distribution system such as voltage rise of distribution line and protection problem. Flexible, Reliable and Intelligent Electrical eNergy Delivery System, which is called FRIENDS, has been proposed as one of promising distribution system for such requirements, and intensive studies are under way. One of features of the system is introducing Quality Control Center (QCC) into the system for unbundled power quality service and easy installation of DGs. Two types of QCCs for such purposes are proposed, and simulation results are shown in this paper.

  • PDF

Image Generator Design for OLED Panel Test (OLED 패널 테스트를 위한 영상 발생기 설계)

  • Yoon, Suk-Moon;Lee, Seung-Ho
    • Journal of IKEEE
    • /
    • v.24 no.1
    • /
    • pp.25-32
    • /
    • 2020
  • In this paper, we propose an image generator for OLED panel test that can compensate for color coordinates and luminance by using panel defect inspection and optical measurement while displaying images on OLED panel. The proposed image generator consists of two processes: the image generation process and the process of compensating color coordinates and luminance using optical measurement. In the image generating process, the panel is set to receive the panel information to drive the panel, and the image is output by adjusting the output setting of the image generator according to the panel information. The output form of the image is configured by digital RGB method. The pattern generation algorithm inside the image generator outputs color and gray image data by transmitting color data to a 24-bit data line based on a synchronization signal according to the resolution of the panel. The process of compensating color coordinates and luminance using optical measurement outputs an image to an OLED panel in an image generator, and compensates for a portion where color coordinates and luminance data measured by an optical module differ from reference data. To evaluate the accuracy of the image generator for the OLED panel test proposed in this paper, Xilinx's Spartan 6 series XC6SLX25-FG484 FPGA was used and the design tool was ISE 14.5. The output of the image generation process was confirmed that the target setting value and the simulation result value for the digital RGB output using the oscilloscope matched. Compensating the color coordinates and luminance using optical measurements showed accuracy within the error rate suggested by the panel manufacturer.