• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.3
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• pp.16-23
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• 1998

In this paper, we present a fast and efficient Iterative Improvement Partitioning(IIP) technique for VLSI circuits and hybrid bucket structures on its implementation. The IIP algorithms are very widely used in VLSI circuit partition due to their time efficiency. As the performance of these algorithms depends on choices of moving cell, various methods have been proposed. Specially, Cluster-Removal algorithm by S. Dutt significantly improved partition quality. We indicate the weakness of previous algorithms wjere they used a uniform method for choice of cells during for choice of cells during the improvement. To solve the problem, we propose a new IIP technique that selects the method for choice of cells according to the improvement status and present hybrid bucket structures for easy implementation. The time complexity of proposed algorithm is the same with FM method and the experimental results on ACM/SIGDA benchmark circuits show improvment up to 33-44%, 45%-50% and 10-12% in cutsize over FM, LA-3 and CLIP respectively. Also with less CUP tiem, it outperforms Paraboli and MELO represented constructive-partition methods by about 12% and 24%, respectively.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.9 no.6
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• pp.1269-1276
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• 2005

In this paper, Mixer using the direct-conversion method intended to use in front-end of a RF receiver is designed. The direct conversion Mixer is an alternative wireless receiver architecture to the well-established superheterodyne, particularly for high integration, low power, and low cost. It operates at 2.4GHz band, and is designed and simulated with a 0.35um CMOS technology and HSPICE simulator. Layout is implemented with a Mentor IC Station. The 2.4GHz CMOS Mixer employs a modified single-balanced Gilbert Cell with additional MOSFET in the output stages to improve IIP2, which is a standard of linearity in direct conversion receiver. Additional coversion-stages's transconductances are controlled by each MOSFET's physical properties. The HSPICE simulation results show that the 2.4GHz CMOS Mixer has voltage gam of 29dB, IIP2 of 63dBm, respectively. The Mixer also draws 3.5mA from a 3.3V supply.

• Journal of electromagnetic engineering and science
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• v.4 no.4
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• pp.143-149
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• 2004

This paper describes characteristics of the single-balanced low IF resistive FET mixer for the digital beam forming(DBF) receiver. This DBF receiver based on the direct conversion method is designed with Low IF I and Q channel. A radio frequency(RF), a local oscillator(LO) and an intermediate frequency(IF) considered in this research are 1950 MHz, 1940 MHz and 10 MHz, respectively. Super low noise HJ FET of NE3210S01 is considered in design. The measured results of the proposed mixer are observed IF output power of -22.8 dBm without spurious signal at 10 MHz, conversion loss of -12.8 dB, isolation characteristics of -20 dB below, 1 dB gain compression point(PldB) of -3.9 dBm, input third order intercept point(IIP3) of 20 dBm, output third order intercept point(OIP3) of 4 dBm and dynamic range of 30 dBm. The proposed mixer has 1.0 dB higher IIP3 than previously published single-balanced resistive and GaAs FET mixers, and has 3.0 dB higher IIP3 and 4.3 dB higher PldB than CMOS mixers. This mixer was fabricated on 0.7874 mm thick microstrip $substrate(\varepsilon_r=2.5)$ and the total size is $123.1\;mm\times107.6\;mm$.

• JSTS:Journal of Semiconductor Technology and Science
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• v.2 no.1
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• pp.7-18
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• 2002

Single-ended differential RF circuit topologies fully utilizing complementary characteristics of both NMOS and PMOS are proposed, which have inherent advantage of both single-ended and differential circuits. Using this concept, we propose a CCPP (Complementary CMOS parallel push-pull) amplifier which has single-ended input/output with differential amplifying characteristics, leading to more than 30 dB improvement on $IIP_2$. In addition, complementary resistive mixer is also proposed, which provides not only differential IF outputs from single-ended RF input, but much better linearity as well as isolation characteristics. Experimental results using $0.35{\;}\mu\textrm{m}$ CMOS process show that, compared with conventional NMOS resistive mixer, the proposed mixer shows 15 dB better LO-to-IF isolation, 4.6 dB better $IIP_2$, and 4.5 dB better $IIP_3$performances.

• Proceedings of the IEEK Conference
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• 2006.06a
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• pp.505-506
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• 2006

In this paper, the linearization technique for CMOS low-noise amplifier (LNA) using the derivative superposition method through the multiple gated transistors configuration is presented. LNA based on 0.13um RF CMOS process has been implemented with a modified cascode configuration using multiple gated common source transistors to fulfill a high linearity. Compared with a conventional cascode type LNA, the third order input intercept point (IIP3) per DC power consumption (IIP3/DC) is improved by 3.85 dB. The LNA achieved 2.5-dBm IIP3 with 13.4-dB gain, 3.6 dB NF at 2.4 GHz consuming 8.56 mA from a 1.5-V supply.

• Anxiety and mood
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• v.14 no.2
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• pp.120-126
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• 2018

Objective : Psychopathy has been suggested as one of the important cause of violence in patients with schizophrenia. The purpose of this study was to evaluate the personality disorder in criminal schizophrenia. Methods : A total of 187 criminal schizophrenia participated in this study. All participants filled out the Korean Inventory of Interpersonal Problem Personality Disorder Scales (K-IIP-PD), Psychopathic Personality Inventory-Revised (PPI-R), Personality Assessment Inventory (PAI). Using the correlations between the scales, we investigated whether K-IIP-PD could be used to evaluate personality disorder in criminal schizophrenia. Moreover, participants were divided into two groups of psychopathic and nonpsychopathic schizophrenics, and scores of K-IIP-PD were compared between the two subgroups. Results : The overall correlation between the scales was very high. In particular, sum of 3 item scores (interprsonal sensitivity+interpersonal ambivalence+aggression) and aggression of K-IIP-PD were highly correlated with PPI-R and PAI. Total score of personality disorder scale and subscales were higher in psychopathic schizophrenic group compared to nonpsychopathic schizophrenic group. Conclusion : The K-IIP-PD could be used to assess the antisocial and aggressive nature of criminal schizophrenia. Further studies in various clinical groups including the general population are required.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.44 no.7 s.361
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• pp.41-46
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• 2007

A novel post-linearization technique is proposed for CMOS cascode low noise amplifier (LNA). The technique uses dual common gate FETs one of which delivers the linear currents to a load and the other one sinks the $3^{rd}$ order intermodulation currents of output currents from the common source FET. Selective current branching can be implemented in $0.18{\mu}m$ CMOS process by using a thick oxide FET as an IM3 sinker with a normal FET as a linear current buffer. A differential LNA adopting this technique is designed at 2.14GHz. The measurement results show 11dBm IIP3, 15.5dB power gain and 2.85dB noise figure consuming 12.4mA from 1.8V power supply. Compared with the LNA with turning off the IM3 sinker, the proposed technique improves the IIP3 by 7.5 dB.

• Journal of the Institute of Electronics and Information Engineers
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• v.49 no.12
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• pp.242-246
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• 2012

This paper presents an integrated low noise and highly linear wideband RF front-end for a digital terrestrial and cable TV tuner, which are used as a part of double-conversion TV tuner. The low noise amplifier (LNA) has a low noise figure and high linearity by adopting a noise canceling technique based on current amplification. The up-conversion mixer and SAW buffer have high linearity by employing a third order intermodulation cancellation technique. The proposed RF front-end is designed in a $0.18{\mu}m$ CMOS and draws 60 mA from a 1.8 V supply voltage. The RF front-end shows a voltage gain of 30 dB, an average single side-band noise figure of 4.2 dB, an IIP2 of 40 dBm, and an IIP3 of -4.5 dBm for the entire band from 48 MHz to 862Hz.

• Journal of Satellite, Information and Communications
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• v.9 no.2
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• pp.7-11
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• 2014

In this paper, we designed resistive MMIC mixer using $0.5{\mu}m$ p-HEMT process. This Mixer is designed to have a similar performance in -4 ~ 4 dBm local oscillator signal power level and to maintain a constant conversion loss and linear performance due to the variation of local signal. In order to have such characteristics, we designed new feedback circuit topology by using FET, and minimized performance change for LO signal power level variation, also obtain MMIC mixer characteristics which is able to apply in wideband. In the design result, When the LO signal power is -4 ~ 4 dBm, there was 6 dB conversion loss and it came up with the excellent result that IIP3 got over 30 dBm in 0.5 ~ 2.6GHz frequency band.

• Journal of the Korea Computer Industry Society
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• v.2 no.11
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• pp.1477-1482
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• 2001

In this paper, we examined receiving parameters of receiver and also analyzed them through simulation based on J-STD-018, which is the minimum specification of PCS mobile station. Receiving system was made a passive double balance mixer which has low gain and high IIP3, and an intermediate frequency amplifier for enhancing the low gain. The result of simulating receiving parameter is as follows: noise figure which is the parameter of specification of the receiving sensitivity is 6.746dB, IIP3 which is the parameter of specification of the intermodulation spurious response attenuation is -11.358dBm.