• Title/Summary/Keyword: IGZO TFTs

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Investigation of bias illumination stress in solution-processed bilayer metal-oxide thin-film transistors

  • Lee, Woobin;Eom, Jimi;Kim, Yong-Hoon
    • Proceedings of the Korean Vacuum Society Conference
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    • 2016.02a
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    • pp.302.1-302.1
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    • 2016
  • Solution-processed amorphous metal-oxide thin-film transistors (TFTs) are considered as promising candidates for the upcoming transparent and flexible electronics due to their transparent property, good performance uniformity and possibility to fabricate at a low-temperature. In addition, solution processing metal oxide TFTs may allow non-vacuum fabrication of flexible electronic which can be more utilizable for easy and low-cost fabrication. Recently, for high-mobility oxide TFTs, multi-layered oxide channel devices have been introduced such as superlattice channel structure and heterojunction structure. However, only a few studies have been mentioned on the bias illumination stress in the multi- layered oxide TFTs. Therefore, in this research, we investigated the effects of bias illumination stress in solution-processed bilayer oxide TFTs which are fabricated by the deep ultraviolet photochemical activation process. For studying the electrical and stability characteristics, we implemented positive bias stress (PBS) and negative bias illumination stress (NBIS). Also, we studied the electrical properties such as field-effect mobility, threshold voltage ($V_T$) and subthreshold slop (SS) to understand effects of the bilayer channel structure.

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Improved Electrical Properties of Indium Gallium Zinc Oxide Thin-Film Transistors by AZO/Ag/AZO Multilayer Electrode

  • No, Young-Soo;Yang, Jeong-Do;Park, Dong-Hee;Kim, Tae-Whan;Choi, Ji-Won;Choi, Won-Kook
    • Journal of Sensor Science and Technology
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    • v.22 no.2
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    • pp.105-110
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    • 2013
  • We fabricated an a-IGZO thin film transistor (TFT) with AZO/Ag/AZO transparent multilayer source/drain contacts by rf magnetron sputtering. a-IGZO TFT with AZO/Ag/AZO multilayer S/D electrodes (W/L = 400/50 ${\mu}m$) showed a subs-threshold swing of 3.78 V/dec, a minimum off-current of $10^{-12}$ A, a threshold voltage of 0.41 V, a field effect mobility of $10.86cm^2/Vs$, and an on/off ratio of $9{\times}10^9$. From the ultraviolet photoemission spectroscopy, it was revealed that the enhanced electrical performance resulted from the lowering of the Schottky barrier between a-IGZO and Ag due to the insertion of an AZO layer and thus the AZO/Ag/AZO multilayer would be very appropriate for a promising S/D contact material for the fabrication of high performance TFTs.

Effect of RF Power on the Stability of a-IGZO Thin Film Transistors

  • Choe, Hyeok-U;Gang, Geum-Sik;No, Yong-Han
    • Proceedings of the Korean Vacuum Society Conference
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    • 2013.02a
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    • pp.354-355
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    • 2013
  • 최근 디스플레이 분야에서 amorphous InGaZnO (a-IGZO) thin film transistors (TFTs)는 a-Si:H에 비해 비정질 상태에서도 비교적 높은 이동도를 가지고 다결정 Si 반도체에 비해 저온공정이 가능하고 대면적화가 용이한 장점 때문에 주목받고 있다. 또한 넓은 밴드갭을 가지기 때문에 가시광선 영역에서 투명하여 투명소자에도 응용이 가능하다. 본 연구에서는 RF magnetron sputtering법을 이용하여 RF power의 변화에 따라 IGZO 박막의 positive bias stress (PBS)에 대한 안정성을 조사하였다. 소결된 타겟으로는 In:Ga:ZnO를 각각 2:2:1 mol%의 조성비로 소결하여 이용하였고, 공정 조건은 초기 압력 Torr, 증착 압력 Torr, Ar:O2=18:12 sccm로 고정하였다. 공정 변수로는 130 W, 150 W, 170 W, 200 W로 변화를 주어 실험을 진행하였다. PBS 측정은 gate bias를 10 V로 고정하여 stress 시간을 각각 0, 30, 100, 300, 1,000, 3,000, 7,000초를 적용하였다. 측정 결과 RF power가 증가할수록 문턱전압의 변화량이 증가하는 것을 보였다. 130 W의 경우 4.47 V의 변화량을 보였지만 200 W의 경우는 10.01 V로 증가되어 나타났다. 따라서 RF power을 낮추어 만들어진 소자의 경우 RF power를 높여 만들어진 소자에 비해 PBS에 대한 안정성이 더 높은 결과를 확인하였다.

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A Transparent Logic Circuit for RFID Tag in a-IGZO TFT Technology

  • Yang, Byung-Do;Oh, Jae-Mun;Kang, Hyeong-Ju;Park, Sang-Hee;Hwang, Chi-Sun;Ryu, Min Ki;Pi, Jae-Eun
    • ETRI Journal
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    • v.35 no.4
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    • pp.610-616
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    • 2013
  • This paper proposes a transparent logic circuit for radio frequency identification (RFID) tags in amorphous indium-gallium-zinc-oxide (a-IGZO) thin-film transistor (TFT) technology. The RFID logic circuit generates 16-bit code programmed in read-only memory. All circuits are implemented in a pseudo-CMOS logic style using transparent a-IGZO TFTs. The transmittance degradation due to the transparent RFID logic chip is 2.5% to 8% in a 300-nm to 800-nm wavelength. The RFID logic chip generates Manchester-encoded 16-bit data with a 3.2-kHz clock frequency and consumes 170 ${\mu}W$ at $V_{DD}=6$ V. It employs 222 transistors and occupies a chip area of 5.85 $mm^2$.

Capacitive Touch Sensor Pixel Circuit with Single a-InGaZnO Thin Film Transistor (단일 a-InGaZnO 박막 트랜지스터를 이용한 정전용량 터치 화소 센서 회로)

  • Kang, In Hye;Hwang, Sang Ho;Baek, Yeong Jo;Moon, Seung Jae;Bae, Byung Seong
    • Journal of Sensor Science and Technology
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    • v.28 no.2
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    • pp.133-138
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    • 2019
  • The a-InGaZnO (a-IGZO) thin film transistor (TFT) has the advantages of larger mobility than that of amorphous silicon TFTs, acceptable reliability and uniformity over a large area, and low process cost. A capacitive-type touch sensor was studied with an a-IGZO TFT that can be used on the front side of a display due to its transparency. A capacitive sensor detects changes of capacitance between the surface of the finger and the sensor electrode. The capacitance varies according to the distance between the sensor plate and the touching or non-touching of the sensing electrode. A capacitive touch sensor using only one a-IGZO TFT was developed with the reduction of two bus lines, which made it easy to reduce the pixel pitch. The proposed sensor circuit maintained the amplification performance, which was investigated for various drive conditions.

Effects of Al-doping on IZO Thin Film for Transparent TFT

  • Bang, J.H.;Jung, J.H.;Song, P.K.
    • Proceedings of the Korean Vacuum Society Conference
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    • 2011.02a
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    • pp.207-207
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    • 2011
  • Amorphous transparent oxide semiconductors (a-TOS) have been widely studied for many optoelectronic devices such as AM-OLED (active-matrix organic light emitting diodes). Recently, Nomura et al. demonstrated high performance amorphous IGZO (In-Ga-Zn-O) TFTs.1 Despite the amorphous structure, due to the conduction band minimum (CBM) that made of spherically extended s-orbitals of the constituent metals, an a-IGZO TFT shows high mobility.2,3 But IGZO films contain high cost rare metals. Therefore, we need to investigate the alternatives. Because Aluminum has a high bond enthalpy with oxygen atom and Alumina has a high lattice energy, we try to replace Gallium with Aluminum that is high reserve low cost material. In this study, we focused on the electrical properties of IZO:Al thin films as a channel layer of TFTs. IZO:Al were deposited on unheated non-alkali glass substrates (5 cm ${\times}$ 5 cm) by magnetron co-sputtering system with two cathodes equipped with IZO target and Al target, respectively. The sintered ceramic IZO disc (3 inch ${\phi}$, 5 mm t) and metal Al target (3 inch ${\phi}$, 5 mm t) are used for deposition. The O2 gas was used as the reactive gas to control carrier concentration and mobility. Deposition was carried out under various sputtering conditions to investigate the effect of sputtering process on the characteristics of IZO:Al thin films. Correlation between sputtering factors and electronic properties of the film will be discussed in detail.

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Effects of Interfacial Dielectric Layers on the Electrical Performance of Top-Gate In-Ga-Zn-Oxide Thin-Film Transistors

  • Cheong, Woo-Seok;Lee, Jeong-Min;Lee, Jong-Ho;KoPark, Sang-Hee;Yoon, Sung-Min;Byun, Chun-Won;Yang, Shin-Hyuk;Chung, Sung-Mook;Cho, Kyoung-Ik;Hwang, Chi-Sun
    • ETRI Journal
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    • v.31 no.6
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    • pp.660-666
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    • 2009
  • We investigate the effects of interfacial dielectric layers (IDLs) on the electrical properties of top-gate In-Ga-Zn-oxide (IGZO) thin film transistors (TFTs) fabricated at low temperatures below $200^{\circ}C$, using a target composition of In:Ga:Zn = 2:1:2 (atomic ratio). Using four types of TFT structures combined with such dielectric materials as $Si_3N_4$ and $Al_2O_3$, the electrical properties are analyzed. After post-annealing at $200^{\circ}C$ for 1 hour in an $O_2$ ambient, the sub-threshold swing is improved in all TFT types, which indicates a reduction of the interfacial trap sites. During negative-bias stress tests on TFTs with a $Si_3N_4$ IDL, the degradation sources are closely related to unstable bond states, such as Si-based broken bonds and hydrogen-based bonds. From constant-current stress tests of $I_d$ = 3 ${\mu}A$, an IGZO-TFT with heat-treated $Si_3N_4$ IDL shows a good stability performance, which is attributed to the compensation effect of the original charge-injection and electron-trapping behavior.

Low voltage operating $InGaZnO_4$ thin film transistors using high-k $MgO_{0.3}BST_{0.7}$ gate dielectric (고유전 $MgO_{0.3}BST_{0.7}$ 게이트 절연막을 이용한 $InGaZnO_4$ 기반의 트랜지스터의 저전압 구동 특성 연구)

  • Kim, Dong-Hun;Cho, Nam-Gyu;Chang, Young-Eun;Kim, Ho-Gi;Kim, Il-Doo
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2008.11a
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    • pp.40-40
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    • 2008
  • $InGaZnO_4$ based thin film transistors (TFTs) are of interest for large area and low cost electronics. The TFTs have strong potential for application in flat panel displays and portable electronics due to their high field effect mobility, high on/off current ratios, and high optical transparency. The application of such room temperature processed transistors, however, is often limited by the operation voltage and long-tenn stability. Therefore, attaining an optimum thickness is necessary. We investigated the thickness dependence of a room temperature grown $MgO_{0.3}BST_{0.7}$ composite gate dielectric and an $InGaZnO_4$ (IGZO) active semiconductor on the electrical characteristics of thin film transistors fabricated on a polyethylene terephthalate (PET) substrate. The TFT characteristics were changed markedly with variation of the gate dielectric and semiconductor thickness. The optimum gate dielectric and active semiconductor thickness were 300 nm and 30 nm, respectively. The TFT showed low operating voltage of less than 4 V, field effect mobility of 21.34 cm2/$V{\cdot}s$, an on/off ratio of $8.27\times10^6$, threshold voltage of 2.2 V, and a subthreshold swing of 0.42 V/dec.

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The Effect of Microwave Annealing Time on the Electrical Characteristics for InGaZnO Thin-Film Transistors (마이크로파 조사 시간에 따른 InGaZnO 박막 트랜지스터의 전기적 특성 평가)

  • Jang, Seong Cheol;Park, Ji-Min;Kim, Hyoung-Do;Lee, Hyun Seok;Kim, Hyun-Suk
    • Korean Journal of Materials Research
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    • v.30 no.11
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    • pp.615-620
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    • 2020
  • Oxide semiconductor, represented by a-IGZO, has been commercialized in the market as active layer of TFTs of display backplanes due to its various advantages over a-Si. a-IGZO can be deposited at room temperature by RF magnetron sputtering process; however, additional thermal annealing above 300℃ is required to obtain good semiconducting properties and stability. These temperature are too high for common flexible substrates like PET, PEN, and PI. In this work, effects of microwave annealing time on IGZO thin film and associated thin-film transistors are demonstrated. As the microwave annealing time increases, the electrical properties of a-IGZO TFT improve to a degree similar to that during thermal annealing. Optimal microwave annealed IGZO TFT exhibits mobility, SS, Vth, and VH of 6.45 ㎠/Vs, 0.17 V/dec, 1.53 V, and 0.47 V, respectively. PBS and NBS stability tests confirm that microwave annealing can effectively improve the interface between the dielectric and the active layer.

Simultaneous Low-Temperature Plasma Annealing Process for Enhancing the Electrical Performance of a-IGZO Thin Film Transistors (a-IGZO 박막 트랜지스터의 전기적 성능 개선을 위한 동시 저온 플라즈마 어닐링 공정)

  • Jung Hun Choi;Jae-Yun Lee;Beom Gu Lee;Jung Moo Seo;Sung-Jin Kim
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.37 no.6
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    • pp.630-636
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    • 2024
  • The display industry has recently been at the forefront of innovative advancements in modern electronic devices. Technological progress such as flexible display holds significant potential across various application fields, particularly in wearable devices and rollable displays. A low-temperature process is essential for fabricating such displays. One of the key technologies in displays is the thin film transistor (TFT), with amorphous indium gallium zinc oxide (a-IGZO) receiving particular attention. a-IGZO is widely applied in high-performance displays due to its high charge mobility and stability. While a thermal treatment above 350℃ is typically required to maximize the electrical performance of a-IGZO TFTs, such high temperatures pose challenges for utilizing polymer substrates like plastics. Here, we thesis investigates the simultaneous low-temperature plasma annealing process to develop next-generation high-performance flexible display devices. To define the optimal temperature, devices were fabricated and analyzed at varying temperatures of 40℃, 80℃, 120℃, and 160℃. Experimental results indicated that devices fabricated at 160℃ and 80℃ exhibited superior performance, with those at 160℃ demonstrating better performance in terms of current ratio, threshold voltage, and subthreshold swing. These findings confirm that the simultaneous low-temperature plasma annealing process is effective for next-generation high-performance displays.