• Journal of the Institute of Electronics Engineers of Korea SD
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• v.47 no.2
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• pp.100-105
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• 2010

In this paper, a FM radio receiver integrated circuit has been developed based on $0.5{\mu}m$ CMOS process for Zero-Crossing FM demodulator over the 88MHz to 108MHz band. The receiver is designed with the low-IF architecture, and includes Low Noise Amplifier(LNA), Down-Conversion Mixer, Phase Locked Loop(PLL), IF LPF, and a comparator. The measured results of the LNA and Mixer show that the conversion gain of 23.2 dB, the input PldB of -14 dBm, and the noise figure of 15 dB. The measured analog block of the LPF and comparator show the voltage gain of over 89 dB, and the IF LPF can configure the passband from 600KHz to 1.3MHz with 100KHz step through the internal control register banks. The designed FM radio receiver operates at 4.5V with the total current consumption of 15.3mA, so the total power consumption is about 68.85mW. The commercial FM radio has been successfully received.

• Journal of the Institute of Electronics and Information Engineers
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• v.51 no.7
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• pp.103-110
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• 2014

Recent TSV based 3D Integrated Circuit (IC) technology needs more powerful thermal management techniques. However, because cooling cost and form factor are restricted, thermal management are emphasis on software based techniques. But in case of throttling thermal management which one of the most candidate technique, increasing bus occupation induce total performance decrease. To solve communication bottleneck issue in TSV based 3D SoC, we proposed adaptive throttling technique Experimental results show that the proposed method can improve throughput by about 72% compare with minimal path routing.

• Journal of IKEEE
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• v.19 no.4
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• pp.541-547
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• 2015

In current semiconductor manufacturing, as the feature size of integrated circuit (IC) devices continuously shrinks, detecting endpoint in plasma etching process is more difficult than before. For endpoint detection, various kinds of sensors are installed in semiconductor manufacturing equipments, and sensor data are gathered with predefined sampling rate. Generally, detecting endpoint is performed using OES data of by-product. In this study, OES data of both by-product and etchant gas are used to improve reliability of endpoint detection. For the OES data pre-processing, a combination of Signal to Noise Ratio (SNR) and Principal Component Analysis (PCA),are used. Polynomial Regression and Expanded Hidden Markov model (eHMM) technique are applied to pre-processed OES data to detect endpoint.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.40 no.8
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• pp.598-609
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• 2003

This paper describes a CMOS IF PLL frequency synthesizer. The designed frequency synthesizer can be programmed to operate at various intermediate frequencies using different external LC-tanks. The VCO with automatic amplitude control provides constant output power independent of the Q-factor of the external LC-tank. The designed frequency divider includes an 8/9 or 16/17 dual-modulus prescaler and can be programmed to operate at different frequencies by external serial data for various applications. The designed circuit is fabricated using a 0.35${\mu}{\textrm}{m}$ n-well CMOS process. Measurement results show that the phase noise is 114dBc/Hz@100kHz and the lock time is less than 300$mutextrm{s}$. It consumes 16mW from 3V supply. The die area is 730${\mu}{\textrm}{m}$$\times$950${\mu}{\textrm}{m}$.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2003.05a
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• pp.41-41
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• 2003

텅스텐(W)은 높은 thermal stability 와 process compatibility 및 우수한 corrosion r resistance 둥으로 integrated circuit (IC)의 gate 및 interconnection 둥으로의 활용이 대두되고 있으며, 차세대 thin film transistor liquid crystal display (TFT-LCD)의 gate 및 interconnection m materials 둥으로 사용되고 았다. 그러나, 이러한 장점을 가지고 있는 팅스텐 박막이 실제 공정상에 적용되가 위해서는 건식 식각이 주로 사용되는데, 이는 wet chemical 을 이용한 습식 식각을 사용할 경우 낮은 etch rate, line width 의 감소 및 postetch residue 잔류 동의 문제가 발생하기 때문이다. 또한 W interconnection etching 을 하기 위해서는 높은 텅스텐 박막의 etch rate 과 하부 layer ( (amorphous silicon 또는 poly-SD와의 높은 etch selectivity 가 필수적 이 라 할 수 있다. 그러 나, 지금까지 연구되어온 결과에 따르면 텅스탠과 하부 layer 와의 etch selectivity 는 2 이하로 매우 낮게 관찰되고 았으며, 텅스텐의 etch rate 또한 150nm/min 이하로 낮은 값을 나타내고 있다. 따라서 본 연구에서는 halogen-based inductively coupled plasma 를 이용하여 텅스텐 박막 식각시 여러 가지 첨가 가스에 따른 높은 텅스탠 박막의 etch rate 과 하부 layer 와의 높은 etch s selectivity 를 얻고자 하였으며, 그에 따른 식각 메커니즘에 대하여 알아보고자 하였다. $CF_4/Cl_2$ gas chemistry 에 첨 가 가스로 $N_2$와 Ar을 첨 가할 경 우 텅 스텐 박막과 하부 layer 간의 etch selectivity 증가는 관찰되지 않았으며, 반면에 첨가 가스로 $O_2$를 사용할 경우, $O_2$의 첨가량이 증가함에 따라 etch s selectivity 는 계속적으로 증가렴을 관찰할 수 있었다. 이는 $O_2$ 첨가에 따라 형성되는 WOF4 에 의한 텅스텐의 etch rates 의 감소에 비하여, $Si0_2$ 등의 형성에 의한 poly-Si etch rates 이 더욱 크게 감소하였기 때문으로 사료된다. W 과 poly-Si 의 식각 특성을 이해하기 위하여 X -ray photoelectron spectroscopy (XPS)를 사용하였으며, 식각 전후의 etch depth 를 측정하기 위하여 stylus p pmfilometeT 를 이용하였다.

• Journal of Korean Society of Occupational and Environmental Hygiene
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• v.29 no.3
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• pp.310-321
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• 2019

Objectives: The purpose of this study was to investigate types and characteristics of chemical substances used in LCD(Liquid crystal display) panel manufacturing process. Methods: The LCD panel manufacturing process is divided into the fabrication(fab) process and module process. The use of chemical substances by process was investigated at four fab processes and two module processes at two domestic TFT-LCD(Thin film transistor-Liquid crystal display) panel manufacturing sites. Results: LCD panels are manufactured through various unit processes such as sputtering, chemical vapor deposition(CVD), etching, and photolithography, and a range of chemicals are used in each process. Metal target materials including copper, aluminum, and indium tin oxide are used in the sputtering process, and gaseous materials such as phosphine, silane, and chlorine are used in CVD and dry etching processes. Inorganic acids such as hydrofluoric acid, nitric acid and sulfuric acid are used in wet etching process, and photoresist and developer are used in photolithography process. Chemical substances for the alignment of liquid crystal, such as polyimides, liquid crystals, and sealants are used in a liquid crystal process. Adhesives and hardeners for adhesion of driver IC and printed circuit board(PCB) to the LCD panel are used in the module process. Conclusions: LCD panels are produced through dozens of unit processes using various types of chemical substances in clean room facilities. Hazardous substances such as organic solvents, reactive gases, irritants, and toxic substances are used in the manufacturing processes, but periodic workplace monitoring applies only to certain chemical substances by law. Therefore, efforts should be made to minimize worker exposure to chemical substances used in LCD panel manufacturing process.

• Journal of IKEEE
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• v.28 no.2
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• pp.174-179
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• 2024

In this work, we introduce a complementary metal-oxide semiconductor(CMOS)-based integrated circuit(IC) measurement set-up for quantum computer control and read-out using a cryogenic refrigerator. CMOS circuits have to operate at extremely low temperatures of 3 to 5 K for qubit stability and noise reduction. The existing cryogenic measurement system is liquid helium quenching, which is expensive due to the long-term use of expendable resources. Therefore, we describe a cryogenic measurement system based on a closed cycle refrigerator (CCR) that is cost-free even when using helium gas for long periods of time. The refrigerator capable of reaching 4.7 K was built using a Gifford-Mcmahon(G-M) type cryocooler. This is expected to be a cryogenic refrigerator set-up with excellent price competitiveness.

• Journal of Intelligence and Information Systems
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• v.20 no.2
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• pp.163-178
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• 2014

Following research proposes "Virtualization of Smart Cards (ViSCa)" which is a security system that aims to provide a multi-device platform for the deployment of services that require a strong security protocol, both for the access & authentication and execution of its applications and focuses on analyzing Virtualization of Smart Cards (ViSCa) platform-based mobile payment service by comparing with other similar cases. At the present day, the appearance of new ICT, the diffusion of new user devices (such as smartphones, tablet PC, and so on) and the growth of internet penetration rate are creating many world-shaking services yet in the most of these applications' private information has to be shared, which means that security breaches and illegal access to that information are real threats that have to be solved. Also mobile payment service is, one of the innovative services, has same issues which are real threats for users because mobile payment service sometimes requires user identification, an authentication procedure and confidential data sharing. Thus, an extra layer of security is needed in their communication and execution protocols. The Virtualization of Smart Cards (ViSCa), concept is a holistic approach and centralized management for a security system that pursues to provide a ubiquitous multi-device platform for the arrangement of mobile payment services that demand a powerful security protocol, both for the access & authentication and execution of its applications. In this sense, Virtualization of Smart Cards (ViSCa) offers full interoperability and full access from any user device without any loss of security. The concept prevents possible attacks by third parties, guaranteeing the confidentiality of personal data, bank accounts or private financial information. The Virtualization of Smart Cards (ViSCa) concept is split in two different phases: the execution of the user authentication protocol on the user device and the cloud architecture that executes the secure application. Thus, the secure service access is guaranteed at anytime, anywhere and through any device supporting previously required security mechanisms. The security level is improved by using virtualization technology in the cloud. This virtualization technology is used terminal virtualization to virtualize smart card hardware and thrive to manage virtualized smart cards as a whole, through mobile cloud technology in Virtualization of Smart Cards (ViSCa) platform-based mobile payment service. This entire process is referred to as Smart Card as a Service (SCaaS). Virtualization of Smart Cards (ViSCa) platform-based mobile payment service virtualizes smart card, which is used as payment mean, and loads it in to the mobile cloud. Authentication takes place through application and helps log on to mobile cloud and chooses one of virtualized smart card as a payment method. To decide the scope of the research, which is comparing Virtualization of Smart Cards (ViSCa) platform-based mobile payment service with other similar cases, we categorized the prior researches' mobile payment service groups into distinct feature and service type. Both groups store credit card's data in the mobile device and settle the payment process at the offline market. By the location where the electronic financial transaction information (data) is stored, the groups can be categorized into two main service types. First is "App Method" which loads the data in the server connected to the application. Second "Mobile Card Method" stores its data in the Integrated Circuit (IC) chip, which holds financial transaction data, which is inbuilt in the mobile device secure element (SE). Through prior researches on accept factors of mobile payment service and its market environment, we came up with six key factors of comparative analysis which are economic, generality, security, convenience(ease of use), applicability and efficiency. Within the chosen group, we compared and analyzed the selected cases and Virtualization of Smart Cards (ViSCa) platform-based mobile payment service.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.42 no.12
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• pp.53-60
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• 2005

This work proposes a 10b 100 MS/s $1.4\;mm^2$ CMOS ADC for low-power multimedia applications. The proposed two-step pipeline ADC minimizes chip area and power dissipation at the target resolution and sampling rate. The wide-band SHA employs a gate-bootstrapping circuit to handle both single-ended and differential inputs with 1.2 Vp-p at 10b accuracy while the second-stage flash ADC employs open-loop offset sampling techniques to achieve 6b resolution. A 3-D fully symmetrical layout reduces the capacitor and device mismatch of the first-stage MDAC. The low-noise references are integrated on chip with optional off-chip voltage references. The prototype 10b ADC implemented in a 0.18 um CMOS shows the maximum measured DNL and INL of 0.59 LSB and 0.77 LSB, respectively. The ADC demonstrates the SNDR of 54 dB, the SFDR of 62 dB, and the power dissipation of 56 mW at 100 MS/s.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.12 no.6
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• pp.2747-2753
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• 2011

In this paper, a PWM current-mode DC-DC boost converter for mobile phone flash application has been proposed. The converter which is operated with 5 Mhz high switching frequency is capable of reducing mounting area of passive devices such as inductor and capacitor, consequently is suitable for compact mobile phones. This boost converter consists of a power stage and a control block. Circuit elements of the power stage are inductor, output capacitor, MOS transistors and feedback resistors. Meanwhile, the control block consists of pulse width modulator, error amplifier, oscillator etc. Proposed boost converter has been designed and verified in a $0.5\;{\mu}m$ 1-poly 2-metal CMOS process technology. Simulation results show that the output voltage is 4.26 V in 3.7 V input voltage, output current 100 mA which is larger than 25 ~ 50 mA in conventional 500 Khz driven converter when the duty ratio is 0.15.