• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2004년도 제6회 학술대회 논문집 일렉트렛트 및 응용기술연구회
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• pp.52-56
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• 2004

The movement of electron in the semiconductor-gap-semiconductor was observed by the variation of V-I characteristic as a distance two ZnO(1010) single crystals. When the resistance between two crystals was $10^2{\sim}10^4{\Omega}$, V-I characteristics had the pattern of the field emission or ohmic contact. On the other hand, when the resistance was larger than $10^7{\Omega}$ by increasing the distance between two crystals, the effect of surface barrier was prominent. This result leads to the conclusion that both the field emission (or ohmic contact) and the surface barrier effect including the tunneling have the influence on V-I characteristics of mechanically contacted crystals.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2000년도 영호남학술대회 논문집
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• pp.179-184
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• 2000

The I-V characteristics of $ZnO-Pr_6O_{11}-CoO-Dy_2O_3$ based varistors were investigated in the $Pr_6O_{11}/CoO$ composition ratio range of 0.5/0.5 to 1.0/1.0 and sintering temperature range of 1300 to $1350^{\circ}C$ as the basic study to develop the advanced $Pr_6O_{11}$-based ZnO varistors. All varistors except for $Pr_6O_{11}$/CoO = 0.5/1.0 exhibited the best I-V characteristics at $1350^{\circ}C$. However, the varistors with $Pr_6O_{11}$/CoO= 0.5/1.0 exhibited the best I-V characteristics at $1350^{\circ}C$. The varistors with $Pr_6O_{11}$/CoO= 0.5/1.0 of all varistors exhibited the best I-V characteristics, which the nonlinear exponent is 36.9 and the leakage current is 7.6 ${\mu}A$ Therefore, it was estimated that ZnO-$Pr_6O_{11}-CoO-Dy_2O_3$ ceramics with $Pr_6O_{11}$/CoO= 0.5/1.0 will be usefully used as varistor materials in the future.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1992년도 춘계학술대회 논문집
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• pp.91-96
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• 1992

The nonvolatile SNOSFET EEPROM memory devices with the channel width and iength of 15[$\mu\textrm{m}$]${\times}$15[$\mu\textrm{m}$], 15[$\mu\textrm{m}$]${\times}$1.5[$\mu\textrm{m}$] and 1.9[$\mu\textrm{m}$]${\times}$1.7[$\mu\textrm{m}$] were fabricated by using the actual CMOS 1 [Mbit] process technology. The charateristics of I$\_$D/-V$\_$D/, I$\_$D/-V$\_$G/ were investigated and compared with the channel width and length. From the result of measuring the I$\_$D/-V$\_$D/ charges into the nitride layer by applying the gate voltage, these devices ere found to have a low conductance state with little drain current and a high conductance state with much drain current. It was shown that the devices of 15[$\mu\textrm{m}$]${\times}$15[$\mu\textrm{m}$] represented the long channel characteristics and the devices of 15[$\mu\textrm{m}$]${\times}$1.5[$\mu\textrm{m}$] and 1.9[$\mu\textrm{m}$]${\times}$1.7[$\mu\textrm{m}$] represented the short channel characteristics. In the characteristics of I$\_$D/-V$\_$D/, the critical threshold voltages of the devices were V$\_$w/ = +34[V] at t$\_$w/ = 50[sec] in the low conductance state, and the memory window sizes wee 6.3[V], 7.4[V] and 3.4[V] at the channel width and length of 15[$\mu\textrm{m}$]${\times}$15[$\mu\textrm{m}$], 15[$\mu\textrm{m}$]${\times}$1.5[$\mu\textrm{m}$], 1.9[$\mu\textrm{m}$]${\times}$1.7[$\mu\textrm{m}$], respectively. The positive logic conductive characteristics are suitable to the logic circuit designing.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2009년도 제40회 하계학술대회
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• pp.2150_2151
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• 2009

Solar, as an ideal renewable energy, has inexhaustible, clean and safe characteristics. However, solar energy is an extreme intermittent and inconstant energy source. In order to improve the photovoltaic system efficiency and utilize the solar energy more fully, and the DC current vary with module temperature, it is necessary to study the characteristics of photovoltaic I-V according to the external factors. This paper presents the analysis of characteristics of photovoltaic I-V according to the module temperature. The results show that it seems that when the module temperature increases, the DC current increases. But actually, because when the irradiation increases, the DC current increases, the result of the relationship between DC current and the module temperature of solar cell will be effects by the increasing irradiation.

• 한국재료학회:학술대회논문집
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• 한국재료학회 2002년도 추계학술발표강연 및 논문개요집
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• pp.79-79
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• 2002

• 전자공학회논문지D
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• 제35D권12호
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• pp.48-52
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• 1998

본 논문에서는 SOI 기판 위에 새롭게 제안된 측면 채널과 나노 점을 갖는 나노 구조의 기억소자를 제작하였다. Top-silicon의 측면이 채널영역이 되고 나노 점이 이 채널 영역의 위에 반응성 이온 식각(RIE)에 의해 형성되는 구조를 가지는 이 소자는 측면 채널(edge channel)의 너비가 SOI기판의 열산화에 의해 얇아진 top-silicon의 두께에 의해 결정되고, 나노 점의 크기는 반응성 이온 식각(RIE) 및 전자선 직접 묘화에 의해 결정된다. 제작된 나노 구조 소자의 I/sub d/-V/sub d/, I/sub d/-V/sub g/ 특성 및 -20V에서 +14V까지의 게이트 전압 영역에서 문턱전압의 변화 범위가 약 1V정도 되는 기억소자의 특성을 얻었다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2009년도 추계학술대회 논문집
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• pp.139-139
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• 2009

As ideal new energy, solar cell has renewable and inexhaustible characteristics and the fuel cell only needs low maintenance and low operating cost. This paper introduces hybrid system of solar cell and fuel cell considering the advantages of stable and sustainable energy from the economic point of view. Then the paper shows the I-V characteristics of the solar module which are dependent on the power of the halogen lamp and the P-I and I-V characteristics of fuel cells which are connected in parallel and series.

• 한국정보통신학회:학술대회논문집
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• 한국정보통신학회 2021년도 추계학술대회
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• pp.634-636
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• 2021

이번 연구에서는 피드백 전계 효과 트랜지스터(feedback field-effect transistor, FBFET)의 메크로 모델링에 대한 연구를 SPICE 시뮬레이터를 통해 진행했다. 기존에 제시된 FBFET의 메크로 모델은 두 개의 회로로 구성돼 있으며, 하나는 전하 축적 기능을 구현한 회로이며 다른 하나는 전류 생성 회로이다. 기존 전류 생성회로는 I_DS-V_GS 특성만 구현 가능하여 회로 예측에 어려움이 있다. 이를 해결하기 위해 전류 생성 회로에 다이오드를 추가함으로 I_DS-V_DS 특성까지 구현 가능한 모델을 제시한다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 추계학술대회 논문집 Vol.14 No.1
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• pp.130-132
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• 2001

We have investigated current-voltage (I-V) characteristics of organic light-emitting diodes based on $TPD/Alq_3$ organics depending on the application of forward-reverse bias voltage. Luminance-voltage characteristics and luminous efficiency were measured at the same time when the I-V characteristics were measured. We have observed that the I-V characteristics shows a current mxima at low voltage, which is possibly not related to the emission from $Alq_3$.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 추계학술대회 논문집 Vol.14 No.1
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• pp.201-204
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• 2001

In this paper, for modeling of electrical characteristics in Poly Silicon Thin Film Transistors with process parameters set up optimum values, So, the I-V characteristics of poly silicon TFT parameters are examined and simulated in terms of the variations in process parameter. And these results compared and analyzed simulation values with examination value. The simulation program for characteristic analysis used SUPREM IV for processing, Matlab for modeling by mathematics, and SPICE for electric characteristic of devices. Input parameter for simulation characteristics is like condition of device process sequence, these electric characteristic of $I_D-V_D$ $I_D-V_G$, variations of grain size. The Gate oxide thickness of poly silicon are showed similar results between real device characteristics and simulation characteristics.