• 전기학회논문지
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• 제57권10호
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• pp.1888-1892
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• 2008

In this paper, a new parallel CMOS self-bias differential amplifier is designed to use in high-speed analog signal processing circuits. The designed parallel CMOS self-bias differential amplifier is developed by using internal biasing circuits and the complement gain stages which are parallel connected. And also, the parallel architecture of the designed parallel CMOS self-bias differential amplifier can improve the gain and gain-bandwidth product of the typical CMOS self-bias differential amplifier. With 1.8V $0.8{\mu}m$ CMOS process parameter, the results of HSPICE show that the designed parallel CMOS self-bias differential amplifier has a dc gain and a gain-bandwidth product of 64 dB and 49 MHz respectively.

• Journal of Semiconductor Engineering
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• 제1권2호
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• pp.64-73
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• 2020

As CMOS technology scales down, the design of analog signal processing circuit becomes far more difficult because of steadily decreasing supply voltage and smaller intrinsic gain of transistors. With sub-1V supply voltage, the conventional analog signal processing relying on high-gain amplifiers is not an effective solution and different approach has to be sought. One of the promising approaches is "time-domain analog signal processing" which exploits the improving switching speed of transistors in a scaled CMOS technology. In this paper, various time-domain analog signal processing techniques are explained with some experimental results.

• 대한전기학회논문지:시스템및제어부문D
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• 제52권11호
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• pp.650-656
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• 2003

A high speed Viterbi decoder with a circularly connected 2-dimensional analog processing ceil array Is proposed. The proposed Viterbi .decoder has a 2-dimensional parallel processing structure in which an analog processing cell is placed at each node of a trellis diagram, the output column of the analog processing cells is connected to the decoding column, and thus, the output(last) column becomes a column right before the decoding(first) column. The reference input signal given at a decoding column is propagated to the whole network while Its magnitude is reduced by the amount of a error metric on each branch. The circuit-based decoding is done by adding a trigger signals of same magnitudes to disconnect the path corresponding to logic 0 (or 1) and by observing its effect at an output column (the former column of the decoding column). The proposed Viterbi decoder has advantages in that it is operated with better performance of error correction, has a shorter latency and requires no path memories. The performance of error correction with the proposed Viterbi decoder is tested via the software simulation.

• 전기학회논문지
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• 제61권2호
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• pp.298-302
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• 2012

The linear encoder used in the BLAC driving circuit consists usually analog type sensor, and need signal transform from analog sinusoidal to digital one for application in the PWM algorithm that is used to control motor current. When the motor is driven in low speed, it is required many operations and higher quality DSP to convert the hole sensor signal to digital one with enough resolution. In this paper, the another method to convert that signal with enough resolution without calculation of sine function is proposed. This is very simple and have high resolution even if the motor is driving in low speed. To verify the proposed method, BLAC motor is used, and it is proved that the motor is tracking well the reference step signal in the low speed as well as in the high one.

• 제어로봇시스템학회:학술대회논문집
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• 제어로봇시스템학회 1990년도 한국자동제어학술회의논문집(국내학술편); KOEX, Seoul; 26-27 Oct. 1990
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• pp.322-326
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• 1990

The solution of problems in the automation of mold manufacturing process are high speed and resolution. To catch two problems at once, digital servo system will be essential replacing the analog servo system. In this paper, we tried some hardware/software approach including, designing basic structure, modeling of servo actuator, and designing & simulating of velocity & position controller. Finally, we constructed the hardware for 1 axis digital servo controller of NC system. As a result we obtained the design technics of digital servo systems for high speed NC system.

• Journal of Power Electronics
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• 제3권3호
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• pp.167-174
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• 2003

In a switched reluctance motor drive, it is important to synchronize the stator phase excitation with the rotor position, because the position of rotor is an essential information. Although high resolution optical encoders or resolvers are used to provide a precise position information, these sensors are expensive. Moreover, in the high-speed region, switching angles are fluctuated back and forth out of the preset value, which is caused by the sampling period of the microprocessor. In this paper, a low cost analog encoder suitable for practical applications is proposed. And the control algorithm to generate switching signals using a Simple digital logic is presented. The validity of the proposed analog encoder with a proper logic controller is verified from the experiments.

• 한국융합학회논문지
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• 제7권1호
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• pp.9-15
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• 2016

본 논문은 Cortex-M4 기반 STM32 프로세서를 이용한 고속 데이터수집 및 융합 시스템 설계에 대해서 기술하였다. 본 논문에서 설계한 데이터수집 시스템은 산업현장에서 발생되는 각종 데이터를 4 종류까지 실시간으로 수집하여 서버 컴퓨터로 자료를 전송할 수 있으며, 각종 센서와 연결이 간편하여 설치가 간단하고 간편한 필드-프레임을 개발해서 동작 속도를 매우 향상 시켰다. 또한 각종 센서를 쉽게 연결할 수 있도록 디지털 신호 입력부와 아나로그 신호 입력부를 별도로 두어서 서로 다른 센서에서 입력된 신호를 융합할 수 있게 설계되었다. 이러한 융합형 데이터수집 시스템은 실시간으로 각종 데이터의 동시 수집과 모터제어에 잘 동작하였으며 정밀제품의 품질향상에 크게 기여하리라 판단된다.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 하계종합학술대회 논문집(2)
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• pp.197-200
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• 2002

In this paper, presents a 1.8V 8-bit 300MSPS CMOS Subranging Analog to Digital Converter (ADC) with a novel reference multiplex is described. The proposed hか converter is composed of Sub A/D Converter block, MUX (Multiplexer) block and digital block. In order to obtain a high-speed operation, further, a novel dynamic latch, an encoder of novel algorithm and a MUX block are proposed. As a result, this A/D Converter is operated 100MHz input frequence by 300MHz sampling rate.

• 한국분말재료학회지
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• 제19권4호
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• pp.297-303
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• 2012

In this study, voltammetry system for realizing high sensitivity nano-labeled sensor of detecting heavy metals was designed, and optimal system operating conditions were determined. High precision digital to analog converter (DAC) circuit was designed to control applied unit voltage at working electrode and analog to digital converter (ADC) circuit was designed to measure the current range of $0.1{\sim}1000{\mu}A$ at counter electrode. Main control unit (MCU) circuit for controlling voltammetry system with 150 MHz clock speed, main memory circuit for the mathematical operation processing of the measured current value and independent power circuit for analog/digital circuit parts to reduce various noise were designed. From result of voltammetry system operation, oxidation current peaks which are proportional to the concentrations of Zn, Cd and Pb ions were found at each oxidation potential with high precision.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2001년도 하계종합학술대회 논문집(2)
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• pp.253-256
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• 2001

This paper introduces the design of high-speed analog- to-digital converter for high-definition TV, camcorders, portable equipments and implemented in a 0.65${\mu}{\textrm}{m}$ CMOS technology. Key circuits developed for low power and high speed A/D converter are a dynamic comparator that consumes no static power, a source follower buffered op amp that achives wide bandwidth using large input devices. The converter achieves low power dissipation of 40-mW at 3.3-V power supply. Measured performance includes 0.53 LSB of INL and 0.48 LSB of DNL while sampling at 60MHz.