• 제목/요약/키워드: High-resistive silicon

검색결과 33건 처리시간 0.031초

An Efficient Design of a DC-Block Band Pass Filter for the L-Band

  • Kaur, Avneet;Malhotra, Jyoteesh
    • Transactions on Electrical and Electronic Materials
    • /
    • 제18권2호
    • /
    • pp.62-65
    • /
    • 2017
  • In this paper, three DC Block designs are presented which efficiently meet the need of modern-day compactsize wireless communication systems. As one of the important parts of a complete system design, the proposed microstrip-based DC block with coupled transmission lines efficiently attenuates unwanted frequencies that cause damage to the system. The compact-sized DC block structures are created by incorporating an extended coupled-line section with a radial stub, an enveloped coupled-line section, and using alternate up-down meandering techniques. The structures are analyzed for the L-Band using a high-resistive silicon substrate. At a resonating frequency of 1.575 GHz, the designed DC Block structures have a return loss better than -10 dB, an insertion loss of around -1 dB, and also possess wide pass-band characteristics.

Design and EM Analysis of Dual Band Hilbert Curve Based Wilkinson Power Divider

  • Kaur, Avneet;Singh, Harsimran;Malhotra, Jyoteesh
    • Transactions on Electrical and Electronic Materials
    • /
    • 제17권5호
    • /
    • pp.257-260
    • /
    • 2016
  • In this paper, two configurations (T-type and Y-type) of dual band Wilkinson Power Divider based upon Hilbert curves are presented. Formerly, the concept of Hilbert Curves was implemented in only designing microstrip antennas. In power dividers, this is the very first attempt of incorporating them for size reduction. In addition to this, an effect of inculcation of high-dielectric constant layer (Hafnium-oxide, HfO2, εr= 25) between a substrate and top metallization in both configurations was investigated. The proposed configurations are designed on a high resistive silicon substrate (HRS) for L and S bands with resonating frequencies of 1.575 and 3.4 GHz. Both configurations have return loss that is better than 20 dB and an insertion loss of around 6 dB; isolation better than 30 dB was achieved for both models.

Cr-SrTiO3 박막을 이용한 Si 기반 1D 형태 저항 변화 메모리의 전류-전압 특성 고찰 (Current Versus Voltage Characteristics of a Si Based 1-Diode Type Resistive Memory with Cr-SrTiO3 Films)

  • 송민영;서유정;김연수;김희동;안호명;김태근
    • 한국전기전자재료학회논문지
    • /
    • 제24권11호
    • /
    • pp.855-858
    • /
    • 2011
  • In this paper, in order to suppress unwanted current paths originating from adjacent cells in a passive crossbar array based on resistive random access memory (RRAM) without extrinsic switching devices, 1-diode type RRAM which consists of a 0.2% chromium-doped strontium titanate (Cr-$SrTiO_3$) film deposited on a silicon substrate, was proposed for high packing density, and intrinsic rectifying characteristics from the current versus voltage characteristics were successfully demonstrated.

Retina-Motivated CMOS Vision Chip Based on Column Parallel Architecture and Switch-Selective Resistive Network

  • Kong, Jae-Sung;Hyun, Hyo-Young;Seo, Sang-Ho;Shin, Jang-Kyoo
    • ETRI Journal
    • /
    • 제30권6호
    • /
    • pp.783-789
    • /
    • 2008
  • A bio-inspired vision chip for edge detection was fabricated using 0.35 ${\mu}m$ double-poly four-metal complementary metal-oxide-semiconductor technology. It mimics the edge detection mechanism of a biological retina. This type of vision chip offer several advantages including compact size, high speed, and dense system integration. Low resolution and relatively high power consumption are common limitations of these chips because of their complex circuit structure. We have tried to overcome these problems by rearranging and simplifying their circuits. A vision chip of $160{\times}120$ pixels has been fabricated in $5{\times}5\;mm^2$ silicon die. It shows less than 10 mW of power consumption.

  • PDF

Thin Film Amorphous/Bulk Crystalline Silicon Tandem Solar Cells with Doped nc-Si:H Tunneling Junction Layers

  • 이선화;이준신;정채환
    • 한국진공학회:학술대회논문집
    • /
    • 한국진공학회 2015년도 제49회 하계 정기학술대회 초록집
    • /
    • pp.257.2-257.2
    • /
    • 2015
  • In this paper, we report on the 10.33% efficient thin film/bulk tandem solar cells with the top cell made of amorphous silicon thin film and p-type bulk crystalline silicon bottom cell. The tunneling junction layers were used the doped nanocrystalline Si layers. It has to allow an ohmic and low resistive connection. For player and n-layer, crystalline volume fraction is ~86%, ~88% and dark conductivity is $3.28{\times}10-2S/cm$, $3.03{\times}10-1S/cm$, respectively. Optimization of the tunneling junction results in fill factor of 66.16 % and open circuit voltage of 1.39 V. The open circuit voltage was closed to the sum of those of the sub-cells. This tandem structure could enable the effective development of a new concept of high-efficiency and low cost cells.

  • PDF

ICP-CVD 비정질 실리콘에 형성된 처리온도에 따른 저온 니켈실리사이드의 물성 변화 (Property of Nickel Silicides on ICP-CVD Amorphous Silicon with Silicidation Temperature)

  • 김종률;최용윤;박종성;송오성
    • 한국산학기술학회논문지
    • /
    • 제9권2호
    • /
    • pp.303-310
    • /
    • 2008
  • ICP-CVD(inductively-coupled Plasma chemical vapor deposition)를 사용하여 $250^{\circ}C$기판온도에서 140 nm 두께의 수소화된 비정질 실리콘(${\alpha}$-Si:H)을 제조하였다. 그 위에 30 nm-Ni을 열증착기를 이용하여 성막하고, $200{\sim}500^{\circ}C$ 사이에서 $50^{\circ}C$간격으로 30분간 진공열처리하여 실리사이드화 처리하였다. 완성된 실리사이드의 처리온도에 따른 실리사이드의 면저항값 변화, 미세구조, 상 분석, 표면조도 변화를 각각 사점면저항측정기, HRXRD(high resolution X-ray diffraction), FE-SEM(field emission scanning electron microscope), TEM(transmission electron microscope), SPM(scanning probe microscope)을 활용하여 확인하였다. $300^{\circ}C$에는 고저항상인 $Ni_3Si$, $400^{\circ}C$에서는 중저항상인 $Ni_2Si$, $450^{\circ}C$이상에서 저저항의 나노급 두께의 균일한 NiSi를 확인되었다. SPM결과에서 저저항 상인 NiSi는 $450^{\circ}C$에서 RMS(root mean square) 표면조도 값도 12 nm이하로 전체 공정온도를 $450^{\circ}C$까지 낮추어 유리와 폴리머기판 등 저온기판에 대응하는 저온 니켈모노실리사이드 공정이 가능하였다.

액상공정을 이용한 탄화규소 세라믹 후막의 제조 (Preparation of Silicon Carbide Ceramic Thick Films by Liquid Process)

  • 김행만;김준수;이홍림;안영철;윤존도
    • 한국세라믹학회지
    • /
    • 제49권1호
    • /
    • pp.95-99
    • /
    • 2012
  • Silicon carbide ceramics are used for oxidation resistive coating films due to their excellent properties like high strength, good oxidation resistance, and good abrasion resistance, but they have poor formability and are prepared by vapor process which is complicated, costly, and sometimes hazardous. In this study, preparation of silicon carbide coating film by liquid process using polymer precursor was attempted. Coating film was prepared by dip coating on substrate followed by heat treatment in argon at $1200^{\circ}C$. By changing the dipping speed, the thickness was controlled. The effects of plasticizer, binder, or fiber addition on suppression of crack generation in the polymer and ceramic films were examined. It was found that fiber additives was effective for suppressing crack generation.

Comb drive를 이용한 RF MEMS 스위치에 관한 연구 (A Study on RF MEMS Switch with Comb Drive)

  • 강성찬;김현철;전국진
    • 대한전자공학회논문지SD
    • /
    • 제45권4호
    • /
    • pp.7-12
    • /
    • 2008
  • 본 논문에서는 comb drive를 이용하여 수평 방향 저항 접촉 방식의 RF MEMS 스위치 개발을 소개한다. 무선통신 트랜시버에서 사용되는 FEM에서 사용될 수 있는 높은 안전성과 좋은 RF 특성을 가지는 스위치의 개발을 목표로 한다. 따라서 작은 삽입손실 특성을 가지기 위해 comb drive를 이용하여 큰 접촉 힘을 발생시키고, 큰 격리도 특성을 가지기 위해 스위치 off 상태에서 작은 정전용량을 갖도록 한다. 그리고 단결정 실리콘을 스위치의 구조물로 사용함으로써 기계적인 안전성을 갖도록 한다. 개발된 RF MEMS 스위치는 26 V의 동작 전압을 가지며, 2 GHz에서 0.44 dB 이하의 삽입손실과 60 dB 이상의 격리도 특성을 가진다.

저온제작 Poly-Si TFT′s의 누설전류 (Leakage Current Low-Temperature Processed Poly-Si TFT′s)

  • 진교원;이진민;김동진;김영호
    • 한국전기전자재료학회:학술대회논문집
    • /
    • 한국전기전자재료학회 1996년도 춘계학술대회 논문집
    • /
    • pp.90-93
    • /
    • 1996
  • The conduction mechanisms of the off-current in low temperature ($\leq$600$^{\circ}C$) processed polycrystalline silicon thin film transistors (LTP poly-Si TFT's) has been systematically studied. Especially, the temperature and bias dependence of the off-current between unpassivated and passivated poly-Si TFT's was investigated and compared. The off-current of unpassivated poly-Si TFT's is due to a resistive current at low gate and drain voltage, thermal emission current at high gate, low drain voltage, and field enhanced thermal emission current in the depletion region near the drain at high gate and drain voltage. After hydrogenation, it was observed that the off-currents were remarkably reduced by plasma-hydrogenation. It was also observed that the off-currents of the passivated poly-Si TFT's are more critically dependent on temperature rather than electric field.

  • PDF

저온 제작 다결정 실리콘 박막 트랜지스터의 off-current메카니즘에 관한 연구 (A study on the off-current mechanism of poly-Si thin film transistors fabricated at low temperature)

  • 진교원;김진;이진민;김동진;조봉희;김영호
    • E2M - 전기 전자와 첨단 소재
    • /
    • 제9권10호
    • /
    • pp.1001-1007
    • /
    • 1996
  • The conduction mechanisms of the off-current in low temperature (.leq. >$600^{\circ}C$) processed polycrystalline silicon thin film transistors (LTP poly-Si TFT'S) have been systematically studied. Especially, the temperature and bias dependence of the off-current between hydrogenated and nonhydrogenated poly-Si TFT's were investigated and compared. The off-current of nonhydrogenated poly-Si TF's is because of a resistive current at low gate and drain voltage, thermally activated current at high gate and low drain voltage, and Poole-Frenkel emission current in the depletion region near the drain at high gate and drain voltage. After hydrogenation it has shown that the off -current mechanism is caused mainly by thermal activation and that the field-induced current component is suppressed.

  • PDF