• Current Optics and Photonics
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• 제2권1호
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• pp.69-78
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• 2018

This paper presents a precise edge detection algorithm for the critical dimension (CD) measurement of a Thin-Film Transistor Liquid-Crystal Display (TFT-LCD) pattern. The sigmoid surface function is proposed to model the blurred step edge. This model can simultaneously find the position and geometry of the edge precisely. The nonlinear least squares fitting method (Levenberg-Marquardt method) is used to model the image intensity distribution into the proposed sigmoid blurred edge model. The suggested algorithm is verified by comparing the CD measurement repeatability from high-magnified blurry and noisy TFT-LCD images with those from the previous Laplacian of Gaussian (LoG) based sub-pixel edge detection algorithm and error function fitting method. The proposed fitting-based edge detection algorithm produces more precise results than the previous method. The suggested algorithm can be applied to in-line precision CD measurement for high-resolution display devices.

• 한국표면공학회지
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• 제48권1호
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• pp.7-10
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• 2015

Recently, oxide TFTs has attracted a lot of interests due to their outstanding properties such as excellent environmental stability, high mobility, wide-band gap energy and high transparency, and investigated through the method using vacuum system and wet solution. In the case of the method using wet solution, process is very simple, however, annealing process should be included. In this study, to overcome the problem of annealing process, atmospheric pressure plasma was used for annealing, and the electrical characteristics such as on/off ration and mobility of device were investigated.

• 한국재료학회지
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• 제11권6호
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• pp.527-532
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• 2001

O$_2$plasma와 H(hfac)을 이용한 Cu 박막의 건식 식각을 조사하였다. 휘발성이 큰 Cu(hfac)$_2$와 $H_2O$를 탈착시키기 위하여 $O_2$ Plasma를 이용한 Cu 박막의 산화와 생성된 Cu 산화막을 H(hfac)과의 반응으로 제거하는 공정으로 식각을 수행하였다. Cu 박막의 식각율은 50-700 /min의 범위를 보였으며, 기판온도, H(hfac)/O$_2$ 유량비, plasma power에 따라 변하였다. Cu 박막의 식각율은 기판온도 215$^{\circ}C$보다 높은 온도구간에서 RF power가 증가함에 따라 증가하였고, 산화 공정과 H (hfac)과의 반응이 균형을 이루는 최적의 H (hfac)/O$_2$ 유량비는 1:1임을 확인하였다. Ti mask를 사용한 Cu Patterning은 유량비 1 : 1, 기판온도 25$0^{\circ}C$에서 실시하였고, 30$^{\circ}$외 taper slope를 갖는 등방성 etching profile을 얻을 수 있었다. Taper angle을 갖는 Cu 건식 patterning은 고해상도의 대면적 thin film transistor liquid-crystal(TFT-LCDs)를 위래 필요한 것으로써 기판온도, RF power, 유량비를 조절한 one-step 공정으로부터 성공적으로 얻을 수 있었다.

• 통합자연과학논문집
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• 제4권4호
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• pp.311-314
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• 2011

Application of self-assembled monolayers (SAMs) to the fabrication of organic thin film transistor has been recently reported very often since it can help to provide ohmic contact between films as well as to form simple and effective electrode pattern. Accordingly, quality of these ultra-thin films is becoming more imperative. In this study, in order to manufacture a high quality SAM pattern, a hydrophobic alkylsilane monolayer and a hydrophilic aminosilane monolayer were selectively coated on $SiO_2$ surface through the consecutive procedures of a micro-contact printing (${\mu}CP$) and dip-coating methods under extremely dry condition. On a SAM pattern cleaned with SC1 solution immediately after ${\mu}CP$, poly(3,4-ethylenedioxythiophene) (PEDOT) source and drain electrode array were very selectively and nicely vapour phase polymerized. On the other side, on a SC1-untreated SAM pattern, PEDOT array was very poorly polymerized. It strongly suggests that the SC1 cleaning process effectively removes unwanted contaminants on SAM pattern, thereby resulting in very selective growth of PEDOT electrode pattern.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2000년도 제18회 학술발표회 논문개요집
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• pp.186-186
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• 2000

After LeComber et al. reported the first amorphous hydrogenated silicon (a-Si: H) TFT, many laboratories started the development of an active matrix LCDs using a-Si:H TFTs formed on glass substrate. With increasing the display area and pixel density of TFT-LCD, however, high mobility TFTs are required for pixel driver of TF-LCD in order to shorten the charging time of the pixel electrodes. The most important of these drawbacks is a-Si's electron mobiliy, which is the speed at which electrons can move through each transistor. The problem of low carier mobility for the a-Si:H TFTs can be overcome by introducing polycrystalline silicon (poly-Si) thin film instead of a-Si:H as a semiconductor layer of TFTs. Therefore, poly-Si has gained increasing interest and has been investigated by many researchers. Recnetly, fabrication of such poly-Si TFT-LCD panels with VGA pixel size and monolithic drivers has been reported, . Especially, fabricating poly-Si TFTs at a temperature mach lower than the strain point of glass is needed in order to have high mobility TFTs on large-size glass substrate, and the monolithic drivers will reduce the cost of TFT-LCDs. The conventional methods to fabricate poly-Si films are low pressure chemical vapor deposition (LPCVD0 as well as solid phase crystallization (SPC), pulsed rapid thermal annealing(PRTA), and eximer laser annealing (ELA). However, these methods have some disadvantages such as high deposition temperature over $600^{\circ}C$, small grain size (<50nm), poor crystallinity, and high grain boundary states. Therefore the low temperature and large area processes using a cheap glass substrate are impossible because of high temperature process. In this study, therefore, we have deposited poly-Si thin films on si(100) and glass substrates at growth temperature of below 40$0^{\circ}C$ using newly developed high rate magnetron sputtering method. To improve the sputtering yield and the growth rate, a high power (10~30 W/cm2) sputtering source with unbalanced magnetron and Si ion extraction grid was designed and constructed based on the results of computer simulation. The maximum deposition rate could be reached to be 0.35$\mu$m/min due to a high ion bombardment. This is 5 times higher than that of conventional sputtering method, and the sputtering yield was also increased up to 80%. The best film was obtained on Si(100) using Si ion extraction grid under 9.0$\times$10-3Torr of working pressure and 11 W/cm2 of the target power density. The electron mobility of the poly-si film grown on Si(100) at 40$0^{\circ}C$ with ion extraction grid shows 96 cm2/V sec. During sputtering, moreover, the characteristics of si source were also analyzed with in situ Langmuir probe method and optical emission spectroscopy.

• Transactions on Electrical and Electronic Materials
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• 제9권6호
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• pp.231-236
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• 2008

B, P, and Cs ions were implanted with various parameters into silicon nitride layers prepared by LPCVD. In order to get the maximum impurity concentration at the silicon nitride surface, a high temperature oxide (HTO) buffer layers was deposited prior to the implantation. Alkali ion and pH sensing properties of the layers were investigated with an electrolyte-insulator-silicon (EIS) structure using high frequency capacitance-voltage (HF-CV) measurements. The ion sensing properties of implanted silicon nitrides were compared to those of as-deposited silicon nitride. Band Cs co-implanted silicon nitrides showed a pronounced difference in pH and alkali ion sensing properties compared to those of as-deposited silicon nitride. B or P implanted silicon nitrides in contrast showed similar ion sensitivities like those of as-deposited silicon nitride.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.557-559
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• 2009

We attempted modulation of hydrogen dilution ratio to achieve both the minimal incubation layer and high deposition rate. The incubation layer thickness was estimated by transmission electron microscopy (TEM) and crystallization fraction was measured by Raman spectroscopy.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2009년도 9th International Meeting on Information Display
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• pp.858-860
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• 2009

We have applied self-assembled monolayer to make high performance and stable OTFT on the organic gate dielectric. The ${\beta}$-phenethyltrichlorosilane (SAM) was coated on the organic gate dielectric and then active layer was printed. Significant improvements in on-currents and threshold voltage shift were achieved for the SAM treated devices compared to device without SAM.

• JSTS:Journal of Semiconductor Technology and Science
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• 제16권2호
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• pp.166-171
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• 2016

Nickel silicide is main issue in Polycrystalline silicon Thin Film Transistor (TFT) which is made by Metal Induced Lateral Crystallization (MILC) method. This Nickel silicide acts as a defect center, and this defect is one of the biggest reason of the high leakage current. In this research, we fabricated polycrystalline TFTs with novel method called Edge Cut (EC). With this new fabrication method, we assumed that nickel silicide at the edge of the channel region is reduced. Electrical properties are measured and trap state density also calculated using Levinson & Proano method.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2004년도 Asia Display / IMID 04
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• pp.153-156
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• 2004

A newly developed flexible active-matrix (AM-) electrophoretic display (EPD) is reported. The AM-EPD features: (1) low-temperature polycrystalline silicon (LTPS) thin film transistor (TFT) technology, (2) fully integrated scan- and data-drivers, (3) flexibility and light-weight realized by transferring the whole circuits onto a plastic substrate using $SUFTLA^{TM}$ (Surface Free Technology by Laser Annealing/Ablation) process. A large storage capacitor is formed in each pixel so that driving electric field can be kept sufficiently strong during a writing period Two-phase driving scheme, a reset-phase which erases a previous image and a writing-phase for writing a new image, was chosen to cope with EPD's high driving voltage. The flexible AM-EPD has been successfully operated with a driving voltage of 8.5 V.