• Journal of Advanced Navigation Technology
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• v.9 no.2
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• pp.164-169
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• 2005

In this paper, the high efficiency Doherty power amplifier using adaptive bias technique has been designed and realized for 2.3GHz Wibro applications. The RF performances of the Doherty power amplifier using adaptive bias technique have been compared with those of a class AB amplifier alone, and conventional Doherty amplifier. The Maximum PAE of designed Doherty power amplifier with adaptive bias technique has been 36.6% at 34.0dBm output power. The proposed Doherty power amplifier showed an improvement 1dB at output power and 7.6% PAE than a class AB amplifier alone.

• Transactions of the Korean Society for Noise and Vibration Engineering
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• v.22 no.2
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• pp.170-178
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• 2012

This paper is concerned with the development of power amplifier and controller for piezoelectric actuator and sensor used in smart structures. Even though a high-voltage power amplifier is provided in the form of an operational amplifier, a very high DC voltage is still necessary as a power supply. In this study, we propose a low-cost design for the power amplifier including the DC power supply. We also need a controller on which a control algorithm will be mounted. In general, a digital signal processing chip is popularly used because of high speed. However, only commercial product is available for smart structure applications. In this paper, a controller consisting of a DSP and electronic circuits suitable for piezoelectric sensor and actuator pair is proposed. To validate the proposed controller with power amplifier, experiment on smart structure was carried out. The experimental results show that the proposed control system can be effectively used for smart structure applications with low cost.

• ETRI Journal
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• v.34 no.6
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• pp.885-891
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• 2012

This paper proposes a high-efficiency power amplifier (PA) with uneven bias. The proposed amplifier consists of a driver amplifier, power stages of the main amplifier with class AB bias, and an auxiliary amplifier with class C bias. Unlike other CMOS PAs, the amplifier adopts a current-mode transformer-based combiner to reduce the output stage loss and size. As a result, the amplifier can improve the efficiency and reduce the quiescent current. The fully integrated CMOS PA is implemented using the commercial Taiwan Semiconductor Manufacturing Company 0.18-${\mu}m$ RF-CMOS process with a supply voltage of 3.3 V. The measured gain, $P_{1dB}$, and efficiency at $P_{1dB}$ are 29 dB, 28.1 dBm, and 37.9%, respectively. When the PA is tested with 54 Mbps of an 802.11g WLAN orthogonal frequency division multiplexing signal, a 25-dB error vector magnitude compliant output power of 22 dBm and a 21.5% efficiency can be obtained.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.3 no.2
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• pp.281-290
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• 1999

This paper presents the development of a high power amplifier for a transmitter of INMARSAT-C operating at L-band(1626.5∼1646.5 MHz). To simplify the fabrication process, the whole system is designed of two parts composed of a driving amplifier and a high power amplifier The HP's AT-41486 is used for driving part and the SGS-THOMSON microelectronics' STM1645 is used the high power amplifier. The SSPA(Solid State Power Amplifier) was fabricated by the both circuits of RF and temperature compensation in aluminum housing. The realized SSPA has more than 36 dB for small signal within 20MHz bandwidth, and the voltage standing wave ratios(VSWR) of input and output Port are less than 1.5:1, respectively. The output Power of 42.2 dBm is achieved at the 1636.5 MHz. These results reveal a high power amplifier of 20 Watt which is the design target.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.49 no.2
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• pp.72-75
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• 2012

In this paper, high-efficiency DC-AC converter is implemented for the wireless power transmission. The DC-AC converter is implemented by combining the oscillator and power amplifier. Because the conversion efficiency of wireless power transmitter is strongly affected by the efficiency of power amplifier, the high-efficiency power amplifier is implemented by using the Class-E amplifier structure. Also, because the output power of oscillator connected to the input stage of power amplifier is low, high-gain two-stages power amplifier using the drive amplifier is implemented to realize the high-output power DC-AC converter. The dual band harmonic suppression filter is implemented to suppress 2nd, 3rd harmonics of 13.56 MHz. The output power and conversion efficiency of DC-AC converter are 40 dBm and 80.2 % at the operation frequency of 13.56 MHz.

• Proceedings of the IEEK Conference
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• 2000.11a
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• pp.317-320
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• 2000

In this paper, a 0.5W, 2GHz high-efficiency class A power amplifier using the dynamic bias control is proposed. First of all, the drain bias control amplifier is analyzed theoretically and designed with commercial devices. Simulation results show that the proposed amplifier has a significant improved efficiency, compared to fixed bias power amplifier.

• The Journal of the Korea institute of electronic communication sciences
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• v.10 no.1
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• pp.13-20
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• 2015

Existing LDMOS power amplifier that used class-AB and doherty system shows 55% of efficiency in 60MHz narrow band. Because RRH has been applied to power amplifier at base station. It is required that over 100MHz expanded band and more than 60% high efficiency power amplifier. In this paper we designed class-J power amplifier using LDMOS FET which has over 60% high efficiency characteristic in 200MHz. The output matching circuit of designed class-J power amplifier has been optimized to contain pure reactance at second harmonic load and has low quality factor Q. As a measurement result of the amplifier, when we input continuous wave signal, we checked 62~70% of power added efficiency(PAE) in 2.06~2.2GHz including WCDMA frequency as a 10W class-J power amplifier.

• ETRI Journal
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• v.31 no.3
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• pp.247-253
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• 2009

We propose a Ku-band driver and high-power amplifier monolithic microwave integrated circuits (MMICs) employing a compensating gate bias circuit using a commercial 0.5 ${\mu}m$ GaAs pHEMT technology. The integrated gate bias circuit provides compensation for the threshold voltage and temperature variations as well as independence of the supply voltage variations. A fabricated two-stage Ku-band driver amplifier MMIC exhibits a typical output power of 30.5 dBm and power-added efficiency (PAE) of 37% over a 13.5 GHz to 15.0 GHz frequency band, while a fabricated three-stage Ku-band high-power amplifier MMIC exhibits a maximum saturated output power of 39.25 dBm (8.4 W) and PAE of 22.7% at 14.5 GHz.

• The Transactions of the Korean Institute of Power Electronics
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• v.19 no.4
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• pp.364-375
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• 2014

Parametric array transducers are used for long-range and highly directional communication in an underwater environments. The power amplifiers for parametric array transducers should have sufficient linear output characteristic and high efficiency to avoid communication errors, system heating, and fuel problems. But the conventional power amplifier with fixed source voltage is very low efficient due to large power loss by the big difference between the fixed source voltage and the amplifier output voltage. Thus to solve the problems this paper proposes the high efficiency power amplifier for parametric array transducers. The proposed power amplifier ensures high linearity of output characteristic by utilizing the push-pull class B type amplifier and furthermore gets high efficiency by applying the envelope tracking technique that variable source voltage tracks the envelope of the amplified signal. Also the paper suggests the detailed circuit topology and design guideline of class B push-pull type amplifier and variable output voltage AC/DC converter. Its characteristics are verified by the detailed simulation and experimental results.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.8
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• pp.1847-1853
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• 2014

The PAPR of the input signal is increased due to OFDMA signal in a mobile communication system. High efficiency of a power amplifier, which accounts for power consumption, is a very important key technology. Digital Pre-Distortion techniques were used to improve the linearity of the power amplifier. The Asymmetric Doherty scheme was used to improve the efficiency of the power amplifier. In this paper, we propose a new structure of Asymmetric Doherty. Drive power amplifier part is separated as main path and peak path, and phase shifter is employed to improve power combine characteristics of the Doherty Amplifier. Also, envelope tracking technology for drive gate bais in drive peak amplifier is used to improve efficiency.