• Transactions on Electrical and Electronic Materials
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• 제2권4호
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• pp.1-6
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• 2001

In this paper, a 1.5 V high-gain high-frequency CMOS complementary operational amplifier is presented. The input stage of op-amp is designed for supporting the constant transconductance on the Input stage by consisting of the parallel-connected rail-to-rail complementary differential pairs. And consisting of the class-AB rail-to-rail output stage using the concept of elementary shunt stage and the grounded-gate cascode compensation technique for improving the low PSRR which was a disadvantage in the general CMOS complementary input stage, the load dependence of open loop gain and the stability of op- amp on the output load are improved, and the high-gain high-frequency operation can be achieved. The designed op-amp operates perfectly on the complementary mode with the 180° phase conversion for a 1.5 V supply voltage, and shows the DC open loop gain of 84 dB, the phase margin of 65°, and the unity gain frequency of 20 MHz. In addition, the amplifier shows the 0.1 % settling time of .179 ㎲ for the positive step and 0.154 ㎲ for the negative step on the 100 mV small-signal step, respectively, and shows the total power dissipation of 8.93 mW.

• 전력전자학회논문지
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• 제21권2호
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• pp.102-110
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• 2016

In this paper, a high-frequency dual mode control LLC resonant converter with wide input voltage range is proposed through zero voltage switching (ZVS) under the universal line input voltage and every load conditions. Conventional small power adapter driving should be satisfied with universal line input voltage because it has no power factor correction circuit regulation. The conventional LLC resonant converter for an adapter can reduce the size of transformer in terms of high-frequency driving and ZVS. However, this converter has a disadvantage in terms of design of resonant tank under various input voltages because the frequency modulation range is very wide to satisfy voltage conversion gain. Compared with the conventional one, the proposed LLC converter can be adapted to universal line input voltage and high-frequency driving because it is controlled by pulse width modulation and pulse frequency modulation with control voltage. The validity of the proposed LLC converter is proved through the 60 W prototype.

• Journal of Power Electronics
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• 제15권1호
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• pp.86-95
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• 2015

An active clamp high step-up boost converter with a coupled inductor is proposed in this paper. In the proposed strategy, a coupled inductor is adopted to achieve a high voltage gain. The clamp circuit is included to achieve the zero-voltage-switching (ZVS) condition for both the main and clamp switches. A rectifier composed of a capacitor and a diode is added to reduce the voltage stress of the output rectifier diode. As a result, diodes with a low reverse-recovery time and forward voltage-drop can be utilized. Since the voltage stresses of the main and clamp switches are far below the output voltage, low-voltage-rated MOSFETs can be adopted to reduce conduction losses. Moreover, the reverse-recovery losses of the diodes are reduced due to the inherent leakage inductance of the coupled inductor. Therefore, high efficiency can be expected. Firstly, the derivation of the proposed converter is given and the operation analysis is described. Then, a steady-state performance analysis of the proposed converter is analyzed in detail. Finally, a 250 W prototype is built to verify the analysis. The measured maximum efficiency of the prototype is 95%.

• Journal of Power Electronics
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• 제15권1호
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• pp.31-38
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• 2015

In this paper, a buck-boost type battery charger is developed for charging battery set with a lower voltage. This battery charger is configured by a rectifier circuit, an integrated boost/buck power converter and a switched capacitors circuit. A boost power converter and a buck power converter sharing a common power electronic switch are integrated to form the integrated boost/buck power converter. By controlling the common power electronic switch, the battery charger performs a hybrid constant-current/constant-voltage charging method and gets a high input power factor. Accordingly, both the power circuit and the control circuit of the developed battery charger are simplified. The switched capacitors circuit is applied to be the output of the boost converter and the input of the buck converter. The switched capacitors circuit can change its voltage according to the utility voltage so as to reduce the step-up voltage gain of the boost converter when the utility voltage is small. Hence, the power efficiency of a buck-boost type battery charger can be improved. Moreover, the step-down voltage gain of the buck power converter is reduced to increase the controllable range of the duty ratio for the common power electronic switch. A prototype is developed and tested to verify the performance of the proposed battery charger.

• Journal of Power Electronics
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• 제18권5호
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• pp.1357-1368
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• 2018

In this paper, a novel high gain bidirectional modular dc-dc converter (BMC) with unipolar and bipolar structures for dc network interconnections is proposed. When compared with traditional dc grid-connecting converters, the proposed converter can achieve a high voltage gain with a simple modular transformerless structure. A sub-modular structure for the BMC is proposed to eliminate the unbalanced current stress between the different power units (levels) in the BMC. This can realize current sharing and standardized production and assembling. In addition, phase-interval operation is introduced to the sub-modules to realize low voltage and current ripple in both sides of the converter. Furthermore, two types of bipolar topologies of the sub-modular BMC were proposed to extend its application in bipolar dc network connections. In addition, the control system was optimized for grid-connection applications by providing various control strategies. Finally, simulations of a 3-level unipolar sub-modular BMC and a 4-level bipolar sub-modular BMC were conducted, and a 1-kW experimental 3-level unipolar prototype was developed to verify the effectiveness of the proposed converter.

• 전기전자학회논문지
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• 제14권2호
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• pp.90-97
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• 2010

본 논문에서는 DT-CMOS(Dynamic Threshold voltage CMOS) 스위칭 소자와 DTMOS Error Amplifier를 사용한 고 효율 전원 제어 장치(PMIC)를 제안하였다. 높은 출력 전류에서 고 전력 효율을 얻기 위하여 PWM(Pulse Width Modulation) 제어 방식을 사용하여 PMIC를 구현하였으며, 낮은 온 저항을 갖는 DT-CMOS를 설계하여 도통 손실을 감소시켰다. 벅 컨버터(Buck converter) 제어 회로는 PWM 제어회로로 되어 있으며, 삼각파 발생기, 밴드갭 기준 전압 회로, DT-CMOS 오차 증폭기, 비교기가 하나의 블록으로 구성되어 있다. 제안된 DT-CMOS 오차증폭기는 72dB DC gain과 83.5위상 여유를 갖도록 설계하였다. DTMOS를 사용한 오차증폭기는 CMOS를 사용한 오차증폭기 보다 약 30%정도 파워 소비 감소를 보였다. Voltage-mode PWM 제어 회로와 낮은 온 저항을 스위칭 소자로 사용하여 구현한 DC-DC converter는 100mA 출력 전류에서 95%의 효율을 구현하였으며, 1mA이하의 대기모드에서도 높은 효율을 구현하기 위하여 LDO를 설계하였다.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2003년도 춘계학술대회 논문집 전기기기 및 에너지변환시스템부문
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• pp.208-211
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• 2003

This paper presents an improved droop method of the high voltage DC power supply which minimizes the voltage droop of a parallel-connected power supply. Conventionally, the droop method has been used to achieve a simple structure and no-interconnections among the power sources. However, it has a trade-off between output voltage regulation and load sharing accuracy. In this paper, the droop is minimized with a current and droop gain control using steady-stage estimation. The proposed method can achieve both high performance voltage regulation and load sharing. Two 10kV, 100mA parallel power modules were made and tested to verify the proposed current-sharing method.

• Smart Structures and Systems
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• 제26권4호
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• pp.521-531
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• 2020

In this paper, a new interleaved high step-up converter with low voltage stress on the switches is proposed. In the proposed converter, soft switching is provided for all switches by just one auxiliary switch, which decreases the conduction loss of auxiliary circuit. Also, the auxiliary circuit is expanded on the converter with more input branches. In the converter all main switches operate under zero voltage switching condition and auxiliary switch operate under zero current switching condition. Because of the interleaved structure, the reliability of converter increases and input current ripples decreases. The clamp capacitor in the converter not only absorb the voltage spikes across the switch due to leakage inductance, but also improve voltage gain. The proposed converter is fully analyzed and to verify the theoretical analysis, a 100 W prototype was implemented. Also, to show the effectiveness of auxiliary circuit on conduction EMI, EMI of the proposed converter comprised with hard switching counterpart.

• Journal of electromagnetic engineering and science
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• 제14권2호
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• pp.47-53
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• 2014

This paper presents a high gain and high harmonic rejection low-noise amplifier (LNA) for software-defined radio receiver. This LNA exploits the high quality factor (Q) series resonance technique. High Q series resonance can amplify the in-band signal voltage and attenuate the out-band signals. This is achieved by a source impedance transformation. This technique does not consume power and can easily support multiband operation. The chip is fabricated in a $0.13-{\mu}m$ CMOS. It supports four bands (640, 710, 830, and 1,070MHz). The measured forward gain ($S_{21}$) is between 12.1 and 17.4 dB and the noise figure is between 2.7 and 3.3 dB. The IIP3 measures between -5.7 and -10.8 dBm, and the third harmonic rejection ratios are more than 30 dB. The LNA consumes 9.6 mW from a 1.2-V supply.

• 전력전자학회논문지
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• 제18권4호
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• pp.342-348
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• 2013

In this paper, an improved non-isolated 3-level high step-up boost converter is proposed. By using the well known duality principle, the proposed converter is derived from two-phase buck converter. Compared with the traditional boost converter and 3-level boost converter, the proposed converter can obtain very high voltage conversion ratio and the voltage stress of switching devices and diodes is only 1/4 of the output voltage. A 1 kW prototype converter is built and tested to verify performances of the proposed converter.