• Proceedings of the IEEK Conference
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• 2002.06b
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• pp.133-136
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• 2002

This paper discusses the design of a sample-and -hold amplifier(SHA) that has a 12-bit resolution with a 100 MS/s speed. The sample-and-hold amplifier uses the open-loop architecture with hold-mode feedthrough cancellation for high accuracy and high sampling speed. The designed SHA is composed of input buffer, sampling switch, and output buffer with additional amplifier for offset cancellation Hard Ware. The input buffer is implemented with folded-cascode type operational transconductance Amplifier(OTA), and sampling switch is implemented with switched source follower(SSF). A spurious free dynamic range (SFDR) of this circuit is 72.6 dB al 100 MS/s. Input signal dynamic range is 1 Vpp differential. Power consumption is 65 ㎽.

• Structural Engineering and Mechanics
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• v.68 no.5
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• pp.549-561
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• 2018

Sobol method is applied as a powerful variance decomposition technique in the field of global sensitivity analysis (GSA). The paper is devoted to increase convergence speed of the extracted Sobol indices using a new proposed sampling technique called genetic based Latine hypercube sampling (GBLHS). This technique is indeed an improved version of restricted Latine hypercube sampling (LHS) and the optimization algorithm is inspired from genetic algorithm in a new approach. The new approach is based on the optimization of minimax value of LHS arrays using manipulation of array indices as chromosomes in genetic algorithm. The improved Sobol method is implemented to perform factor prioritization and fixing of an uncertain comprehensive high speed rotor-bearing system. The finite element method is employed for rotor-bearing modeling by considering Eshleman-Eubanks assumption and interaction of axial force on the rotor whirling behavior. The performance of the GBLHS technique are compared with the Monte Carlo Simulation (MCS), LHS and Optimized LHS (Minimax. criteria). Comparison of the GBLHS with other techniques demonstrates its capability for increasing convergence speed of the sensitivity indices and improving computational time of the GSA.

• Journal of Communications and Networks
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• v.18 no.5
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• pp.818-825
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• 2016

Network management and anomaly detection are challenges in high-speed networks due to the high volume of packets that has to be analysed. Flow-based analysis is a scalable method which reduces the high volume of network traffic by dividing it into flows. As sampling methods are extensively used in flow generators such as NetFlow, the impact of sampling on the performance of flow-based analysis needs to be investigated. Monitoring using sampled traffic is a well-studied research area, however, the impact of sampling on flow-based anomaly detection is a poorly researched area. This paper investigates flow sampling methods and shows that these methods have negative impact on flow-based anomaly detection. Therefore, we propose an efficient probabilistic flow sampling method that can preserve flow traffic distribution. The proposed sampling method takes into account two flow features: Destination IP address and octet. The destination IP addresses are sampled based on the number of received bytes. Our method provides efficient sampled traffic which has the required traffic features for both flow-based anomaly detection and monitoring. The proposed sampling method is evaluated using a number of generated flow-based datasets. The results show improvement in preserved malicious flows.

• Journal of the Korea Society for Simulation
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• v.13 no.3
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• pp.1-10
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• 2004

The cell loss probability required in the ATM network is in the range of 10$^{-9}$ ∼10$^{-12}$ . If Monte Carlo simulation is used to analyze the performance of the ATM node, an enormous amount of computer time is required. To obtain large speed-up factors, importance sampling may be used. Since the Markov-modulated processes have been used to model various high-speed network traffic sources, we consider discrete time single server queueing systems with Markov-modulated arrival processes which can be used to model an ATM node. We apply importance sampling based on the Large Deviation Theory for the performance evaluation of, MMBP/D/1/K, ∑MMBP/D/1/K, and two stage tandem queueing networks with Markov-modulated arrival processes and deterministic service times. The simulation results show that the buffer overflow probabilities obtained by the importance sampling are very close to those obtained by the Monte Carlo simulation and the computer time can be reduced drastically.

• The Journal of the Korea institute of electronic communication sciences
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• v.7 no.2
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• pp.295-301
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• 2012

In this article, we have designed SHA, which has 12 Bit resolution at an input signal range of 1 $V_{pp}$ and operates at a sampling speed of 100 MS/s in order to use at front of high speed ADC. SFDR(Spurious Free Dynamic Range) of the proposed system drops to approximately 66.3 dB resolution when the input frequency is 5 MHz, and the sampling frequency is 100 MHz, however, the circuit without a feedthrough has 12 bit resolution with approximately 73 dB.

• The Transactions of the Korean Institute of Electrical Engineers B
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• v.55 no.7
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• pp.337-345
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• 2006

This paper proposes a high speed SRM drive system for blower application with a new 4-level inverter and precise excitation position generator. For a high speed blower, a proper inverter and control method are proposed and the output characteristics are analyzed. In order to get a fast build-up and demagnetization of excitation current, a 4-level inverter system is proposed. The proposed 4-level inverter has additional charge capacitor, power switch and diode in the conventional asymmetric converter. The charged high voltage is supplied to the phase winding for fast current build-up, and demagnetization current is charged to additional capacitor of the 4-level inverter. In addition, a precise excitation position generator can reduce turn-on and turn-off angle error according to sampling period of digital control system. The proposed high speed SRM drive system is verified by computer simulation and experimental results.

• Proceedings of the IEEK Conference
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• 2003.07c
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• pp.2641-2644
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• 2003

Recently, TRAO Taeduk Radio Astronomy Observatory is developing wide-band digital spectrometer for radio astronomy, which will be used as back-end signal processing unit of Dual channel SIS receiver. So in this paper, we performed development of high speed digitizing sampler for the wide-band digital autocorrelator, which can perform sampling and quantization on pseudo-random gaussian noise with the maximum conversion speed of 1.5 Gsps..

• Proceedings of the Korean Society of Machine Tool Engineers Conference
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• 2002.04a
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• pp.190-198
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• 2002

In switched reluctance motor(SRM) drive, it is necessary to synchronize the stator phase excitation with the rotor position. Therefore the rotor position information is an essential. Usually optical encoders or resolvers are used to provide the rotor position information. These sensors are expensive and are not suitable for high speed operation. In general, the accuracy of the switching angles is dependent upon the resolution of the encoder and the sampling period of the microprocessor. But the region of high speed, switching angles are fluctuated back and forth from the preset values, witch are cause by the sampling period of the microprocessor. Therefore, the low cost linear encoder suitable for the practical and stable SRM drive is proposed and the control algorithm to provide the switching signals using the simple digital logic circuit is also presented in this paper It is verified from the experiments that the proposed encoder and logic controller can be a powerful candidate for the practical low cost SRM drive.

• Proceedings of the IEEK Conference
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• 2004.06b
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• pp.351-354
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• 2004

This thesis presents Bipolar transistor with SAVEN(Self-Aligned VErtical Nitride) structure as a high-speed device which is essential for high-speed system such as optical storage system or mobile communication system, and proposes 0.8${\mu}m$ BiCMOS Process which integrates LDD nMOS, LDD pMOS and SAVEN bipolar transistor into one-chip. The SPICE parameters of LDD nMOS, LDD pMOS and SAVEN Bipolar transistor are extracted, and comparator operating at 500MHz sampling frequency is designed with them. The small Parasitic capacitances of SAVEN bipolar transistor have a direct effect on decreasing recovery time and regeneration time, which is helpful to improve the speed of the comparator. Therefore the SAVEN bipolar transistor with high cutoff frequency is expected to be used in high-speed system.

• The Transactions of the Korea Information Processing Society
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• v.7 no.4
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• pp.1044-1049
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• 2000

In detection of a scene change of the moving pictures which has massive information capacity, the temporal sampling method has faster searching speed than the sequential searching method for the whole moving pictures, yet employed searching algorithm and detection interval greatly affect searching time and searching precision. In this study, the whole moving pictures were primarily retrieved by the temporal sampling method. When there exist a scene change within the sampling interval, we suggested a fast searching algorithm using binary searching and derived an equation formula to determine optimal primary retrieval which can minimize computation, and showed the result of the experiment on MPEG moving pictures. The result of the experiment shows that the searching speed of the suggested algorithm is maximum 13 times faster than the one of he sequential searching method.