• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2003년도 하계종합학술대회 논문집 II
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• pp.919-922
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• 2003

This paper presents a novel low power driving circuit for passive matrix organic lighting emitting diodes (OLED) displays. The proposed driving method for a low power OLED driving circuit which reduce large parasitic capacitance in OLED panel only use current driving method, instead of mixed mode driving method which uses voltage pre-charge technique. The driving circuit is implemented to one chip using 0.35${\mu}{\textrm}{m}$ CMOS process with 18V high voltage devices and it is applicable to 96(R.G.B)X64, 65K color OLED displays for mobile phone application. The maximum switching power dissipation of driving power dissipation is 5.7mW and it is 4% of that of the conventional driving circuit.

• ETRI Journal
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• 제35권2호
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• pp.226-233
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• 2013

This paper presents a two-stage power-efficient class-AB operational transconductance amplifier (OTA) based on an adaptive biasing circuit suited to low-power dissipation and low-voltage operation. The OTA shows significant improvements in driving capability and power dissipation owing to the novel adaptive biasing circuit. The OTA dissipates only $0.4{\mu}W$ from a supply voltage of ${\pm}0.6V$ and exhibits excellent high driving, which results in a slew rate improvement of more than 250 times that of the conventional class-AB amplifier. The design is fabricated using $0.18-{\mu}m$ CMOS technology.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -1
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• pp.86-89
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• 2002

A new design approach for realising low-power low-voltage high-Q high-order RE bandpass filter is proposed. Based on the gyrator-C inductor topology, a 2$\^$nd/-order biquadratic bandpass filter can be realised by adding a series capacitor to the input port of the gyrator. High-Q 2$\^$nd/-order and 4$\^$th/-order fully differential RF bandpass filters operating in the 2.4-㎓ ISM (Industrial, scientific and medical) frequency band under a 2-V single power supply voltage with low power dissipation are reported.

• 한국정보통신학회:학술대회논문집
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• 한국해양정보통신학회 2009년도 추계학술대회
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• pp.461-464
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• 2009

대규모 DC 전력 시스템에서는 회로차단기(circuit break)와 계전기(relay)로 대표되는 기존의 전자기적 회로차단기가 현재 산업 전 분야에 널리 사용 되고 있으나, 최근에는 고 신뢰성, 원격제어능력, 과부하와 단락전류 보호, 적은 열손실(dissipation) 등의 장점을 가지고 있는 원격전력제어기(Remote Solid State Power controller)를 MOSFET 반도체 스위칭 소자를 이용하여 개발하고 있는 추세이며 고품질을 요구하는 시스템에서는 필수적인 부품이 되어가고 있다. 본 논문에서는 회로차단기와 계전기의 기능을 통합한 원격전력제어장치의 $I^2T$ 커브에 대한 이론 분석과 전체 회로 동작에 대한 시뮬레이션 분석을 수행한다.

• Journal of Advanced Marine Engineering and Technology
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• 제40권2호
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• pp.96-101
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• 2016

The thermal management of high-power LED components in an assembly structure is crucial for the stable operation and proper luminous function. This study employs numerical tools to determine the optimum thermal design in LEDs with a heat sink consisting of a crevice-type vapor-chamber heat pipe. The effects of the MCPCB are investigated in terms of the substrate thicknesses on which the LEDs are mounted. Further, different placement configurations in a system module are considered. This study found that for a confined area, a power of 40 W/LED is applicable to a high-power package. Furthermore, the thermal conductivity of dielectric layer materials should ideally be greater than 0.9 W/m.K. The temperature conditions of the vapor chamber in a heat pipe greatly affect the thermal performance of the system. At an offset distance of 9.0 mm and a $2^{\circ}C$ increase in the temperature of the heat pipe, the resulting maximum temperature increase is approximately $1.9^{\circ}C$ for each heat dissipation temperature. Finally, at a thermal conductivity of 0.3 W/m.K, it was found that the total thermal resistance changes dramatically. Above 1.2 W/m.K, the resistance change reduces exponentially.

• 전기학회논문지
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• 제56권11호
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• pp.2017-2022
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• 2007

In a memory, most power is dissipated in line of high capacitance such as decoder lines, word lines, and bit * lines. The decoder size as well as the parastic capacitances of the bit-line are going to reduce, if ROM core size reduces. This paper proposes to reduce a mathod of power dissipation for reducing ROM core size. Design result of ROM used in FFT[2], proposed method lead to up to 40.6%, 42.12%, 37.82% reduction in area, power consumption and number of Tr. respectively compared with previous method.

• Journal of Electrical Engineering and Technology
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• 제4권4호
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• pp.559-565
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• 2009

Power dissipation during scan testing is becoming an important concern as design sizes and gate densities increase. The high switching activity of combinational circuits is an unnecessary operation in scan shift mode. In this paper, we present a novel architecture to reduce test power dissipation in combinational logic by blocking signal transitions at the logic inputs during scan shifting. We propose a unique architecture that uses dmuxed scan flip-flop (DSF) and transmission gate as an alternative to muxed scan flip-flop. The proposed method does not have problems with auto test pattern generation (ATPG) techniques such as test application time and computational complexity. Moreover, our elegant method improves performance degradation and large overhead in terms of area with blocking logic techniques. Experimental results on ITC99 benchmarks show that the proposed architecture can achieve an average improvement of 30.31% in switching activity compared to conventional scan methods. Additionally, the results of simulation with DSF indicate that the powerdelay product (PDP) and area overhead are improved by 28.9% and 15.6%, respectively, compared to existing blocking logic method.

• 조명전기설비학회논문지
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• 제28권10호
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• pp.1-8
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• 2014

Heat dissipation of the high power LED is a critical issue. To estimate the junction temperature of the LED chip is most important in characterizing the heat dissipation, but it is impossible to directly measure it. In this study, surface temperatures of the 12.8W LED bulb was measured for 5 points using a data logger and compared with the simulated results using a thermal simulator based on FVM (finite volume method) to secure a reliability of the simulation. Effects of some factors such as lens, emissivity and air inlet were investigated using simulation works and then the results were analysed.

• 대한전자공학회:학술대회논문집
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• 대한전자공학회 2002년도 ITC-CSCC -2
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• pp.1280-1283
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• 2002

This paper discusses issues in VLSI design and implementation of high performance datapath circuits. Of particular concern will he various types of multiplier and adder, which are fundamental to DSP operations. Performance comparison will be provided in terms of sampling speed, layout area, and in particular, power consumption, with techniques that may be applied to reduce power dissipation also suggested. As an example, a low power, high performance recursive filter achieved through bit-level pipelining technique is illustrated

• Journal of Magnetics
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• 제4권3호
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• pp.98-101
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• 1999

In this work we htave constructed an under water sonar transducer using Terfenol-D rod employing open magnetic circuit. Normally Sonar transducer using Terfenol-D was designed under closed magnetic flux return path, and permanent magnet for dc bias marnetic field, but high magnetic field should be applied to the transducer coil for high sound power and it brings temperature increase inside of the transducer. To improve this heat dissipation problem, we have designed an open magnetic circuit type transducer and we can get 200 dB (re. 1 Pa @ 1m) sound power for the input power of 650 VA.